Improve mask implementation to support any integer and vector types

This commit is contained in:
Christophe Riccio
2014-10-28 20:28:26 +01:00
parent a88d8935be
commit 44382faf59
4 changed files with 133 additions and 31 deletions

View File

@@ -44,7 +44,7 @@ namespace detail
{
GLM_FUNC_QUALIFIER int mask(int Bits)
{
return Bits >= 32 ? 0xffffffff : (static_cast<int>(1) << Bits) - static_cast<int>(1);
return ~((~0) << Bits);
}
}//namespace detail

View File

@@ -57,13 +57,14 @@ namespace glm
/// Build a mask of 'count' bits
///
/// @see gtc_bitfield
GLM_FUNC_DECL int mask(int Bits);
template <typename genType>
GLM_FUNC_DECL genType mask(genType Bits);
/// Build a mask of 'count' bits
///
/// @see gtc_bitfield
template <precision P, template <typename, precision> class vecType>
GLM_FUNC_DECL vecType<int, P> mask(vecType<int, P> const & v);
template <typename T, precision P, template <typename, precision> class vecType>
GLM_FUNC_DECL vecType<T, P> mask(vecType<T, P> const & v);
/// Rotate all bits to the right. All the bits dropped in the right side are inserted back on the left side.
///

View File

@@ -107,23 +107,23 @@ namespace detail
glm::uint32 REG1(x);
glm::uint32 REG2(y);
glm::uint32 REG3(z);
REG1 = ((REG1 << 16) | REG1) & glm::uint32(0x00FF0000FF0000FF);
REG2 = ((REG2 << 16) | REG2) & glm::uint32(0x00FF0000FF0000FF);
REG3 = ((REG3 << 16) | REG3) & glm::uint32(0x00FF0000FF0000FF);
REG1 = ((REG1 << 8) | REG1) & glm::uint32(0xF00F00F00F00F00F);
REG2 = ((REG2 << 8) | REG2) & glm::uint32(0xF00F00F00F00F00F);
REG3 = ((REG3 << 8) | REG3) & glm::uint32(0xF00F00F00F00F00F);
REG1 = ((REG1 << 4) | REG1) & glm::uint32(0x30C30C30C30C30C3);
REG2 = ((REG2 << 4) | REG2) & glm::uint32(0x30C30C30C30C30C3);
REG3 = ((REG3 << 4) | REG3) & glm::uint32(0x30C30C30C30C30C3);
REG1 = ((REG1 << 2) | REG1) & glm::uint32(0x9249249249249249);
REG2 = ((REG2 << 2) | REG2) & glm::uint32(0x9249249249249249);
REG3 = ((REG3 << 2) | REG3) & glm::uint32(0x9249249249249249);
return REG1 | (REG2 << 1) | (REG3 << 2);
}
@@ -133,30 +133,30 @@ namespace detail
glm::uint64 REG1(x);
glm::uint64 REG2(y);
glm::uint64 REG3(z);
REG1 = ((REG1 << 32) | REG1) & glm::uint64(0xFFFF00000000FFFF);
REG2 = ((REG2 << 32) | REG2) & glm::uint64(0xFFFF00000000FFFF);
REG3 = ((REG3 << 32) | REG3) & glm::uint64(0xFFFF00000000FFFF);
REG1 = ((REG1 << 16) | REG1) & glm::uint64(0x00FF0000FF0000FF);
REG2 = ((REG2 << 16) | REG2) & glm::uint64(0x00FF0000FF0000FF);
REG3 = ((REG3 << 16) | REG3) & glm::uint64(0x00FF0000FF0000FF);
REG1 = ((REG1 << 8) | REG1) & glm::uint64(0xF00F00F00F00F00F);
REG2 = ((REG2 << 8) | REG2) & glm::uint64(0xF00F00F00F00F00F);
REG3 = ((REG3 << 8) | REG3) & glm::uint64(0xF00F00F00F00F00F);
REG1 = ((REG1 << 4) | REG1) & glm::uint64(0x30C30C30C30C30C3);
REG2 = ((REG2 << 4) | REG2) & glm::uint64(0x30C30C30C30C30C3);
REG3 = ((REG3 << 4) | REG3) & glm::uint64(0x30C30C30C30C30C3);
REG1 = ((REG1 << 2) | REG1) & glm::uint64(0x9249249249249249);
REG2 = ((REG2 << 2) | REG2) & glm::uint64(0x9249249249249249);
REG3 = ((REG3 << 2) | REG3) & glm::uint64(0x9249249249249249);
return REG1 | (REG2 << 1) | (REG3 << 2);
}
template <>
GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(glm::uint32 x, glm::uint32 y, glm::uint32 z)
{
@@ -194,25 +194,25 @@ namespace detail
glm::uint32 REG2(y);
glm::uint32 REG3(z);
glm::uint32 REG4(w);
REG1 = ((REG1 << 12) | REG1) & glm::uint32(0x000F000F000F000F);
REG2 = ((REG2 << 12) | REG2) & glm::uint32(0x000F000F000F000F);
REG3 = ((REG3 << 12) | REG3) & glm::uint32(0x000F000F000F000F);
REG4 = ((REG4 << 12) | REG4) & glm::uint32(0x000F000F000F000F);
REG1 = ((REG1 << 6) | REG1) & glm::uint32(0x0303030303030303);
REG2 = ((REG2 << 6) | REG2) & glm::uint32(0x0303030303030303);
REG3 = ((REG3 << 6) | REG3) & glm::uint32(0x0303030303030303);
REG4 = ((REG4 << 6) | REG4) & glm::uint32(0x0303030303030303);
REG1 = ((REG1 << 3) | REG1) & glm::uint32(0x1111111111111111);
REG2 = ((REG2 << 3) | REG2) & glm::uint32(0x1111111111111111);
REG3 = ((REG3 << 3) | REG3) & glm::uint32(0x1111111111111111);
REG4 = ((REG4 << 3) | REG4) & glm::uint32(0x1111111111111111);
return REG1 | (REG2 << 1) | (REG3 << 2) | (REG4 << 3);
}
template <>
GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(glm::uint16 x, glm::uint16 y, glm::uint16 z, glm::uint16 w)
{
@@ -245,21 +245,26 @@ namespace detail
}
}//namespace detail
GLM_FUNC_QUALIFIER int mask(int Bits)
template <typename genType>
GLM_FUNC_QUALIFIER genType mask(genType Bits)
{
return Bits >= sizeof(Bits) * 8 ? ~static_cast<int>(0) : (static_cast<int>(1) << Bits) - static_cast<int>(1);
GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'mask' accepts only integer values");
return ~((~static_cast<genType>(0)) << Bits);
}
template <precision P, template <typename, precision> class vecType>
GLM_FUNC_QUALIFIER vecType<int, P> mask(vecType<int, P> const & v)
template <typename T, precision P, template <typename, precision> class vecType>
GLM_FUNC_QUALIFIER vecType<T, P> mask(vecType<T, P> const & v)
{
return detail::functor1<int, int, P, vecType>::call(mask, v);
GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'mask' accepts only integer values");
return ~((~static_cast<T>(0)) << v);
}
template <typename genIType>
GLM_FUNC_QUALIFIER genIType bitfieldRotateRight(genIType In, int Shift)
{
GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'bitfieldRotateRight' only accept integer values");
GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'bitfieldRotateRight' accepts only integer values");
int const BitSize = static_cast<genIType>(sizeof(genIType) * 8);
return (In << static_cast<genIType>(Shift)) | (In >> static_cast<genIType>(BitSize - Shift));
@@ -268,7 +273,7 @@ namespace detail
template <typename T, precision P, template <typename, precision> class vecType>
GLM_FUNC_QUALIFIER vecType<T, P> bitfieldRotateRight(vecType<T, P> const & In, int Shift)
{
GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'bitfieldRotateRight' only accept integer values");
GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'bitfieldRotateRight' accepts only integer values");
int const BitSize = static_cast<int>(sizeof(T) * 8);
return (In << static_cast<T>(Shift)) | (In >> static_cast<T>(BitSize - Shift));
@@ -277,7 +282,7 @@ namespace detail
template <typename genIType>
GLM_FUNC_QUALIFIER genIType bitfieldRotateLeft(genIType In, int Shift)
{
GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'bitfieldRotateLeft' only accept integer values");
GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'bitfieldRotateLeft' accepts only integer values");
int const BitSize = static_cast<genIType>(sizeof(genIType) * 8);
return (In >> static_cast<genIType>(Shift)) | (In << static_cast<genIType>(BitSize - Shift));
@@ -286,7 +291,7 @@ namespace detail
template <typename T, precision P, template <typename, precision> class vecType>
GLM_FUNC_QUALIFIER vecType<T, P> bitfieldRotateLeft(vecType<T, P> const & In, int Shift)
{
GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'bitfieldRotateLeft' only accept integer values");
GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'bitfieldRotateLeft' accepts only integer values");
int const BitSize = static_cast<int>(sizeof(T) * 8);
return (In >> static_cast<T>(Shift)) | (In << static_cast<T>(BitSize - Shift));