Renamed instruction set flags
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@@ -176,23 +176,23 @@ int test_instruction_set()
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if(GLM_ARCH == GLM_ARCH_PURE)
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std::printf("GLM_ARCH_PURE ");
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if(GLM_ARCH & GLM_ARCH_ARM_FLAG)
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if(GLM_ARCH & GLM_ARCH_ARM_BIT)
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std::printf("ARM ");
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if(GLM_ARCH & GLM_ARCH_NEON_FLAG)
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if(GLM_ARCH & GLM_ARCH_NEON_BIT)
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std::printf("NEON ");
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if(GLM_ARCH & GLM_ARCH_AVX2)
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std::printf("AVX2 ");
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if(GLM_ARCH & GLM_ARCH_AVX)
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std::printf("AVX ");
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if(GLM_ARCH & GLM_ARCH_SSE42_FLAG)
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if(GLM_ARCH & GLM_ARCH_SSE42_BIT)
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std::printf("SSE4.2 ");
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if(GLM_ARCH & GLM_ARCH_SSE41_FLAG)
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if(GLM_ARCH & GLM_ARCH_SSE41_BIT)
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std::printf("SSE4.1 ");
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if(GLM_ARCH & GLM_ARCH_SSSE3_FLAG)
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if(GLM_ARCH & GLM_ARCH_SSSE3_BIT)
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std::printf("SSSE3 ");
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if(GLM_ARCH & GLM_ARCH_SSE3_FLAG)
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if(GLM_ARCH & GLM_ARCH_SSE3_BIT)
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std::printf("SSE3 ");
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if(GLM_ARCH & GLM_ARCH_SSE2_FLAG)
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if(GLM_ARCH & GLM_ARCH_SSE2_BIT)
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std::printf("SSE2 ");
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std::printf("\n");
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@@ -505,7 +505,7 @@ namespace bitfieldInterleave
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assert(A == C);
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assert(A == D);
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# if GLM_ARCH & GLM_ARCH_SSE2_FLAG
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# if GLM_ARCH & GLM_ARCH_SSE2_BIT
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glm::uint64 E = sseBitfieldInterleave(x, y);
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glm::uint64 F = sseUnalignedBitfieldInterleave(x, y);
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assert(A == E);
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@@ -515,7 +515,7 @@ namespace bitfieldInterleave
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glm::uint64 Result[2];
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_mm_storeu_si128((__m128i*)Result, G);
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assert(A == Result[0]);
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# endif//GLM_ARCH & GLM_ARCH_SSE2_FLAG
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# endif//GLM_ARCH & GLM_ARCH_SSE2_BIT
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}
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}
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@@ -629,7 +629,7 @@ namespace bitfieldInterleave
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std::printf("glm::detail::bitfieldInterleave Time %d clocks\n", static_cast<unsigned int>(Time));
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}
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# if(GLM_ARCH & GLM_ARCH_SSE2_FLAG && !(GLM_COMPILER & GLM_COMPILER_GCC))
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# if(GLM_ARCH & GLM_ARCH_SSE2_BIT && !(GLM_COMPILER & GLM_COMPILER_GCC))
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{
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// SIMD
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std::vector<__m128i> SimdData;
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@@ -648,7 +648,7 @@ namespace bitfieldInterleave
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std::printf("_mm_bit_interleave_si128 Time %d clocks\n", static_cast<unsigned int>(Time));
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}
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# endif//GLM_ARCH & GLM_ARCH_SSE2_FLAG
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# endif//GLM_ARCH & GLM_ARCH_SSE2_BIT
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return 0;
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}
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