Fixed SIMD code path selection
This commit is contained in:
@@ -8,7 +8,7 @@
|
||||
namespace glm{
|
||||
namespace detail
|
||||
{
|
||||
# if GLM_ARCH & GLM_ARCH_SSE2
|
||||
# if GLM_ARCH & GLM_ARCH_SSE2_FLAG
|
||||
template <precision P>
|
||||
struct compute_inverse<tmat4x4, float, P>
|
||||
{
|
||||
|
||||
@@ -67,25 +67,29 @@
|
||||
# define GLM_MESSAGE_ARCH_DISPLAYED
|
||||
# if(GLM_ARCH == GLM_ARCH_PURE)
|
||||
# pragma message("GLM: Platform independent code")
|
||||
# elif(GLM_ARCH & GLM_ARCH_ARM)
|
||||
# pragma message("GLM: ARM instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_AVX2)
|
||||
# elif(GLM_ARCH == GLM_ARCH_AVX2)
|
||||
# pragma message("GLM: AVX2 instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_AVX)
|
||||
# elif(GLM_ARCH == GLM_ARCH_AVX)
|
||||
# pragma message("GLM: AVX instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_SSE3)
|
||||
# elif(GLM_ARCH == GLM_ARCH_SSE42)
|
||||
# pragma message("GLM: SSE4.2 instruction set")
|
||||
# elif(GLM_ARCH == GLM_ARCH_SSE41)
|
||||
# pragma message("GLM: SSE4.1 instruction set")
|
||||
# elif(GLM_ARCH == GLM_ARCH_SSSE3)
|
||||
# pragma message("GLM: SSSE3 instruction set")
|
||||
# elif(GLM_ARCH == GLM_ARCH_SSE3)
|
||||
# pragma message("GLM: SSE3 instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_SSE2)
|
||||
# elif(GLM_ARCH == GLM_ARCH_SSE2)
|
||||
# pragma message("GLM: SSE2 instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_X86)
|
||||
# elif(GLM_ARCH == GLM_ARCH_X86)
|
||||
# pragma message("GLM: x86 instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_NEON)
|
||||
# elif(GLM_ARCH == GLM_ARCH_NEON)
|
||||
# pragma message("GLM: NEON instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_ARM)
|
||||
# elif(GLM_ARCH == GLM_ARCH_ARM)
|
||||
# pragma message("GLM: ARM instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_MIPS)
|
||||
# elif(GLM_ARCH == GLM_ARCH_MIPS)
|
||||
# pragma message("GLM: MIPS instruction set")
|
||||
# elif(GLM_ARCH & GLM_ARCH_PPC)
|
||||
# elif(GLM_ARCH == GLM_ARCH_PPC)
|
||||
# pragma message("GLM: PowerPC architechture")
|
||||
# endif//GLM_ARCH
|
||||
#endif//GLM_MESSAGE
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
|
||||
#if(GLM_ARCH != GLM_ARCH_PURE)
|
||||
|
||||
#if(GLM_ARCH & GLM_ARCH_SSE2)
|
||||
#if(GLM_ARCH & GLM_ARCH_SSE2_FLAG)
|
||||
# include "../detail/intrinsic_matrix.hpp"
|
||||
# include "../gtx/simd_vec4.hpp"
|
||||
#else
|
||||
|
||||
@@ -19,7 +19,7 @@
|
||||
|
||||
#if(GLM_ARCH != GLM_ARCH_PURE)
|
||||
|
||||
#if(GLM_ARCH & GLM_ARCH_SSE2)
|
||||
#if(GLM_ARCH & GLM_ARCH_SSE2_FLAG)
|
||||
# include "../gtx/simd_mat4.hpp"
|
||||
#else
|
||||
# error "GLM: GLM_GTX_simd_quat requires compiler support of SSE2 through intrinsics"
|
||||
|
||||
@@ -122,7 +122,7 @@ GLM_FUNC_QUALIFIER fquatSIMD operator* (fquatSIMD const & q1, fquatSIMD const &
|
||||
__m128 mul2 = _mm_mul_ps(q1.Data, _mm_shuffle_ps(q2.Data, q2.Data, _MM_SHUFFLE(2, 3, 0, 1)));
|
||||
__m128 mul3 = _mm_mul_ps(q1.Data, q2.Data);
|
||||
|
||||
# if((GLM_ARCH & GLM_ARCH_SSE4))
|
||||
# if(GLM_ARCH & GLM_ARCH_SSE41_FLAG)
|
||||
__m128 add0 = _mm_dp_ps(mul0, _mm_set_ps(1.0f, -1.0f, 1.0f, 1.0f), 0xff);
|
||||
__m128 add1 = _mm_dp_ps(mul1, _mm_set_ps(1.0f, 1.0f, 1.0f, -1.0f), 0xff);
|
||||
__m128 add2 = _mm_dp_ps(mul2, _mm_set_ps(1.0f, 1.0f, -1.0f, 1.0f), 0xff);
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
|
||||
#if(GLM_ARCH != GLM_ARCH_PURE)
|
||||
|
||||
#if(GLM_ARCH & GLM_ARCH_SSE2)
|
||||
#if(GLM_ARCH & GLM_ARCH_SSE2_FLAG)
|
||||
# include "../detail/intrinsic_common.hpp"
|
||||
# include "../detail/intrinsic_geometric.hpp"
|
||||
# include "../detail/intrinsic_integer.hpp"
|
||||
|
||||
@@ -119,4 +119,4 @@ GLM_FUNC_QUALIFIER __m128 glm_f32v4_rfa(__m128 I, __m128 N, __m128 eta)
|
||||
return sub2;
|
||||
}
|
||||
|
||||
#endif//GLM_ARCH & GLM_ARCH_SSE2
|
||||
#endif//GLM_ARCH & GLM_ARCH_SSE2_FLAG
|
||||
|
||||
Reference in New Issue
Block a user