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692 Commits

Author SHA1 Message Date
Christophe Riccio
0e780a5efd - Use Cuda built-in function for abs function implementation with Cuda compiler 2016-05-22 18:04:32 +02:00
Christophe Riccio
cc9916b2c6 Fixed build, missing reference to inverse function 2016-05-22 17:28:18 +02:00
Christophe Riccio
757fe39587 Removed simd precision qualifier. All precision qualifiers may generate SIMD instructions, precision may affect the generated instructions accordingly 2016-05-22 17:12:32 +02:00
Christophe Riccio
93a2f03649 Merge branch '0.9.7' 2016-05-18 22:53:00 +02:00
Christophe Riccio
dcffcbdc97 Fixed GLM_FORCE_INLINE with binary vec4 operators 2016-05-18 22:52:47 +02:00
Christophe Riccio
fd06877778 Too big bug with GCC 4.6 constexpr, haven't tried 4.7, let's see how 4.8 does 2016-05-05 21:06:27 +02:00
Christophe Riccio
60a5f4aea9 Too big bug with GCC 4.6 constexpr, haven't tried 4.7, let's see how 4.8 does 2016-05-05 20:57:37 +02:00
Christophe Riccio
a6047251be Fixed constexpr with SIMD interaction 2016-05-05 20:43:09 +02:00
Christophe Riccio
92a46735d6 Workaround GCC compiler bug with constexpr support 2016-05-05 20:05:31 +02:00
Christophe Riccio
71401d14aa Workaround GCC compiler bug with constexpr support 2016-05-05 19:58:12 +02:00
Christophe Riccio
152c71abff Workaround GCC compiler bug with constexpr support 2016-05-05 19:47:42 +02:00
Christophe Riccio
6d302792ab - Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493 2016-05-05 15:06:03 +02:00
Christophe Riccio
d52766297d - Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493 2016-05-05 14:13:21 +02:00
Christophe Riccio
33bc27ddc4 - Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493 2016-05-05 14:03:20 +02:00
Christophe Riccio
3df1c8755c - Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493 2016-05-05 13:56:40 +02:00
Christophe Riccio
c50f3ed38e - Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493 2016-05-05 13:40:11 +02:00
Christophe Riccio
d0c4bbaef7 - Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493 2016-05-05 13:27:26 +02:00
Christophe Riccio
9a7b802bdc - Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493 2016-05-05 13:05:15 +02:00
Christophe Riccio
7193cd2c3a - Added constexpr for *vec*, *mat*, *quat* and *dual_quat* types #493 2016-05-05 10:38:51 +02:00
Christophe Riccio
93612791cd Removed Apple specific check for LLVM versions 2016-05-04 18:46:59 +02:00
Christophe Riccio
20da5a25db Improved OpenMP support detection for Clang, GCC, ICC and VC 2016-05-04 18:04:44 +02:00
Christophe Riccio
ca3abd6e93 Fixed CUDA support #499, #500, #501 2016-05-04 17:05:02 +02:00
Christophe Riccio
13a997d4e1 Fixed CUDA support #499, #500, #501 2016-05-04 17:03:38 +02:00
Christophe Riccio
affd5f3ba0 Fixed CUDA compiler error in type_vec4.inl #504 2016-05-04 16:35:57 +02:00
Christophe Riccio
1f71f6fb3a Improved SIMD and swizzle operators interactions with GCC and Clang, Added raw SIMD API. 2016-05-03 23:57:41 +02:00
Christophe Riccio
1becd76c5f Fixed build 2016-05-01 12:39:16 +02:00
Christophe Riccio
83999c749a Reorganized SIMD code 2016-05-01 12:29:11 +02:00
Christophe Riccio
96963f88cc Single file for simd specialization 2016-05-01 05:00:13 +02:00
Christophe Riccio
5f05a5e953 Clean up inverse SSE code 2016-05-01 03:42:47 +02:00
Christophe Riccio
a90ef1b45e Fixed warning 2016-05-01 01:31:43 +02:00
Christophe Riccio
b53cc5d098 Fixed build on non-VC compilers 2016-05-01 01:26:42 +02:00
Christophe Riccio
2f9fc55d88 More experiments to improve SIMD support 2016-05-01 01:12:22 +02:00
Christophe Riccio
e9bb34fb78 - Fixed Visual C++ SIMD instruction set automatic detection in 64 bits 2016-04-30 16:27:19 +02:00
Christophe Riccio
8cf76f049b Fixed Visual C++ SIMD instruction set automatic detection in 64 bits 2016-04-30 16:23:55 +02:00
Christophe Riccio
939eb940d4 Renamed GLM_RESTRICT, still unused in the code base 2016-04-30 15:00:37 +02:00
Christophe Riccio
79643cf4fa Merge 0.9.7 branch 2016-04-24 14:58:57 +02:00
Christophe Riccio
9770c9f73d Fixed uaddCarry warning #497 2016-04-24 14:56:44 +02:00
Hauke Rehfeld
c479e444a4 fix: cuda can use anonymous unions 2016-04-15 12:44:36 +02:00
Hauke Rehfeld
30f014472d add: CUDA in setup.hpp 2016-04-15 12:38:08 +02:00
Eric Engestrom
ca46062bea Fix spelling mistakes 2016-04-03 00:50:25 +01:00
Christophe Riccio
66b714c418 Finishing up removing GLM_FORCE_SIZE_FUNC define and passing by copy scalars 2016-03-23 02:01:16 +05:30
Christophe Riccio
bbe076549a Improved coding style consistency, scalars are passed by copy 2016-03-19 17:10:42 +01:00
Christophe Riccio
1d9f8408e6 Merge 0.9.7 branch 2016-03-19 12:53:27 +01:00
Sami Kankaristo
578c4f4f9f Rename tvec1 parameters from scalar to v1/v2 2016-03-19 12:35:12 +01:00
Sami Kankaristo
8662a567b2 Add const & to POD to match other functions in the class 2016-03-19 12:34:09 +01:00
Sami Kankaristo
b7fef63ef8 Remove const & from POD to match other functions in class 2016-03-19 12:33:42 +01:00
Sami Kankaristo
d3036fd010 Add missing operator function definitions 2016-03-19 12:32:42 +01:00
Sami Kankaristo
785c8892d9 Add missing const to declaration 2016-03-19 12:32:24 +01:00
Christophe Riccio
6c61c332f4 Fixed missing GLM_PLATFORM_CYGWIN declaration #495 2016-03-19 12:31:19 +01:00
Christophe Riccio
61d58b0296 Fixed missing GLM_PLATFORM_CYGWIN declaration #495 2016-03-19 12:28:18 +01:00