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Add asdouble, fma, & mad intrinsics and change profile to allow doubles when parsing prototypes

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LoopDawg
2016-06-22 15:20:14 -06:00
parent e5a807276f
commit 1b7fd0f7b7
13 changed files with 810 additions and 745 deletions
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8
Test/hlsl.intrinsics.negative.comp
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@@ -23,7 +23,7 @@ float ComputeShaderFunction(float inF0, float inF1, float inF2, int inI0)
f16tof32(inF0); // expected error: only integer inputs
firstbithigh(inF0); // expected error: only integer inputs
firstbitlow(inF0); // expected error: only integer inputs
fma(inF0, inF1, inF2); // expected error: only double inputs
// fma(inF0, inF1, inF2); // TODO: this might auto-promote: need to check against FXC
fwidth(inF0); // expected error: only valid in pixel stage
InterlockedAdd(gs_ua, gs_ub); // expected error: only valid in pixel stage
InterlockedAdd(gs_ua, gs_ub, out_u1); // expected error: only valid in pixel stage
@@ -84,7 +84,7 @@ float2 ComputeShaderFunction(float2 inF0, float2 inF1, float2 inF2, int2 inI0)
f16tof32(inF0); // expected error: only integer inputs
firstbithigh(inF0); // expected error: only integer inputs
firstbitlow(inF0); // expected error: only integer inputs
fma(inF0, inF1, inF2); // expected error: only double inputs
// fma(inF0, inF1, inF2); // TODO: this might auto-promote: need to check against FXC
fwidth(inF0); // expected error: only valid in pixel stage
InterlockedAdd(gs_ua2, gs_ub2); // expected error: only valid in pixel stage
InterlockedAdd(gs_ua2, gs_ub2, out_u2); // expected error: only valid in pixel stage
@@ -129,7 +129,7 @@ float3 ComputeShaderFunction(float3 inF0, float3 inF1, float3 inF2, int3 inI0)
f16tof32(inF0); // expected error: only integer inputs
firstbithigh(inF0); // expected error: only integer inputs
firstbitlow(inF0); // expected error: only integer inputs
fma(inF0, inF1, inF2); // expected error: only double inputs
// fma(inF0, inF1, inF2); // TODO: this might auto-promote: need to check against FXC
fwidth(inF0); // expected error: only valid in pixel stage
InterlockedAdd(gs_ua3, gs_ub3); // expected error: only valid in pixel stage
InterlockedAdd(gs_ua3, gs_ub3, out_u3); // expected error: only valid in pixel stage
@@ -174,7 +174,7 @@ float4 ComputeShaderFunction(float4 inF0, float4 inF1, float4 inF2, int4 inI0)
f16tof32(inF0); // expected error: only integer inputs
firstbithigh(inF0); // expected error: only integer inputs
firstbitlow(inF0); // expected error: only integer inputs
fma(inF0, inF1, inF2); // expected error: only double inputs
// fma(inF0, inF1, inF2); // TODO: this might auto-promote: need to check against FXC
fwidth(inF0); // expected error: only valid in pixel stage
InterlockedAdd(gs_ua4, gs_ub4); // expected error: only valid in pixel stage
InterlockedAdd(gs_ua4, gs_ub4, out_u4); // expected error: only valid in pixel stage