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Generate separate stores for partially swizzled memory stores

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Full vector and fully specified vector swizzle stores are not affected by this change, only partial swizzles ie swizzles with fewer components than the vector being stored to.

Previously the vector being stored to loaded and any components not specified in the swizzle were used to create a full store to the vector.

While this change generates more SPIR-V instructions, it is necessary for correctness.

Fixes #2518.
This commit is contained in:
Jeremy Hayes
2021-07-16 15:07:16 -06:00
parent 9158061398
commit 6d5b40f051
50 changed files with 31343 additions and 26594 deletions
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77
Test/baseResults/spv.memoryQualifier.frag.out
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@@ -2,7 +2,7 @@ spv.memoryQualifier.frag
Validation failed
// Module Version 10000
// Generated by (magic number): 8000a
// Id's are bound by 97
// Id's are bound by 105
Capability Shader
Capability ImageRect
@@ -106,14 +106,16 @@ Validation failed
58: TypePointer Uniform 6(float)
61: TypePointer Function 6(float)
63: TypePointer Uniform 47(fvec2)
71: 14(int) Constant 2
72: TypePointer Uniform 48(fvec3)
80: 14(int) Constant 5
83: TypeInt 32 0
84: 83(int) Constant 1
88: 83(int) Constant 3
93: 14(int) Constant 3
95: TypePointer Uniform 7(fvec4)
69: TypeInt 32 0
70: 69(int) Constant 0
73: 69(int) Constant 1
76: 14(int) Constant 2
77: TypePointer Uniform 48(fvec3)
87: 69(int) Constant 2
90: 14(int) Constant 5
96: 69(int) Constant 3
101: 14(int) Constant 3
103: TypePointer Uniform 7(fvec4)
4(main): 2 Function None 3
5: Label
9(texel): 8(ptr) Variable Function
@@ -149,29 +151,38 @@ Validation failed
66: 7(fvec4) Load 9(texel)
67: 47(fvec2) VectorShuffle 66 66 0 1
68: 47(fvec2) FAdd 67 65
69: 7(fvec4) Load 9(texel)
70: 7(fvec4) VectorShuffle 69 68 4 5 2 3
Store 9(texel) 70
73: 72(ptr) AccessChain 52 71
74: 48(fvec3) Load 73
75: 7(fvec4) Load 9(texel)
76: 48(fvec3) VectorShuffle 75 75 0 1 2
77: 48(fvec3) FSub 76 74
78: 7(fvec4) Load 9(texel)
79: 7(fvec4) VectorShuffle 78 77 4 5 6 3
Store 9(texel) 79
81: 58(ptr) AccessChain 52 80 57
82: 6(float) Load 81
85: 58(ptr) AccessChain 52 80 15 84
86: 6(float) Load 85
87: 6(float) FAdd 82 86
89: 61(ptr) AccessChain 9(texel) 88
90: 6(float) Load 89
91: 6(float) FAdd 90 87
92: 61(ptr) AccessChain 9(texel) 88
Store 92 91
94: 7(fvec4) Load 9(texel)
96: 95(ptr) AccessChain 52 93
Store 96 94
71: 61(ptr) AccessChain 9(texel) 70
72: 6(float) CompositeExtract 68 0
Store 71 72
74: 61(ptr) AccessChain 9(texel) 73
75: 6(float) CompositeExtract 68 1
Store 74 75
78: 77(ptr) AccessChain 52 76
79: 48(fvec3) Load 78
80: 7(fvec4) Load 9(texel)
81: 48(fvec3) VectorShuffle 80 80 0 1 2
82: 48(fvec3) FSub 81 79
83: 61(ptr) AccessChain 9(texel) 70
84: 6(float) CompositeExtract 82 0
Store 83 84
85: 61(ptr) AccessChain 9(texel) 73
86: 6(float) CompositeExtract 82 1
Store 85 86
88: 61(ptr) AccessChain 9(texel) 87
89: 6(float) CompositeExtract 82 2
Store 88 89
91: 58(ptr) AccessChain 52 90 57
92: 6(float) Load 91
93: 58(ptr) AccessChain 52 90 15 73
94: 6(float) Load 93
95: 6(float) FAdd 92 94
97: 61(ptr) AccessChain 9(texel) 96
98: 6(float) Load 97
99: 6(float) FAdd 98 95
100: 61(ptr) AccessChain 9(texel) 96
Store 100 99
102: 7(fvec4) Load 9(texel)
104: 103(ptr) AccessChain 52 101
Store 104 102
Return
FunctionEnd