From ad7645f4f51fd10c4d945dbfff5410697b484550 Mon Sep 17 00:00:00 2001 From: John Kessenich Date: Mon, 4 Jun 2018 19:11:25 -0600 Subject: [PATCH] Fix #1360: uint->int width conversions must still be typed as uint. --- SPIRV/GlslangToSpv.cpp | 151 ++-- Test/baseResults/spv.explicittypes.frag.out | 676 +++++++++--------- Test/baseResults/spv.int16.amd.frag.out | 64 +- Test/baseResults/spv.int16.frag.out | 52 +- Test/baseResults/spv.int32.frag.out | 104 +-- Test/baseResults/spv.int64.frag.out | 8 +- Test/baseResults/spv.int8.frag.out | 256 +++---- Test/baseResults/spv.vulkan110.int16.frag.out | 52 +- 8 files changed, 662 insertions(+), 701 deletions(-) diff --git a/SPIRV/GlslangToSpv.cpp b/SPIRV/GlslangToSpv.cpp index 6d891093..ec1b5308 100755 --- a/SPIRV/GlslangToSpv.cpp +++ b/SPIRV/GlslangToSpv.cpp @@ -190,7 +190,7 @@ protected: glslang::TBasicType typeProxy); spv::Id createConversion(glslang::TOperator op, OpDecorations&, spv::Id destTypeId, spv::Id operand, glslang::TBasicType typeProxy); - spv::Id createConversionOperation(glslang::TOperator op, spv::Id operand, int vectorSize); + spv::Id createIntWidthConversion(glslang::TOperator op, spv::Id operand, int vectorSize); spv::Id makeSmearedConstant(spv::Id constant, int vectorSize); spv::Id createAtomicOperation(glslang::TOperator op, spv::Decoration precision, spv::Id typeId, std::vector& operands, glslang::TBasicType typeProxy); spv::Id createInvocationsOperation(glslang::TOperator op, spv::Id typeId, std::vector& operands, glslang::TBasicType typeProxy); @@ -4830,109 +4830,45 @@ spv::Id TGlslangToSpvTraverser::createUnaryMatrixOperation(spv::Op op, OpDecorat return result; } -spv::Id TGlslangToSpvTraverser::createConversionOperation(glslang::TOperator op, spv::Id operand, int vectorSize) +// For converting integers where both the bitwidth and the signedness could +// change, but only do the width change here. The caller is still responsible +// for the signedness conversion. +spv::Id TGlslangToSpvTraverser::createIntWidthConversion(glslang::TOperator op, spv::Id operand, int vectorSize) { - spv::Op convOp = spv::OpNop; - spv::Id type = 0; - - spv::Id result = 0; - + // Get the result type width, based on the type to convert to. + int width = 32; switch(op) { + case glslang::EOpConvInt16ToUint8: + case glslang::EOpConvIntToUint8: + case glslang::EOpConvInt64ToUint8: + case glslang::EOpConvUint16ToInt8: + case glslang::EOpConvUintToInt8: + case glslang::EOpConvUint64ToInt8: + width = 8; + break; case glslang::EOpConvInt8ToUint16: - convOp = spv::OpSConvert; - type = builder.makeIntType(16); + case glslang::EOpConvIntToUint16: + case glslang::EOpConvInt64ToUint16: + case glslang::EOpConvUint8ToInt16: + case glslang::EOpConvUintToInt16: + case glslang::EOpConvUint64ToInt16: + width = 16; break; case glslang::EOpConvInt8ToUint: - convOp = spv::OpSConvert; - type = builder.makeIntType(32); + case glslang::EOpConvInt16ToUint: + case glslang::EOpConvInt64ToUint: + case glslang::EOpConvUint8ToInt: + case glslang::EOpConvUint16ToInt: + case glslang::EOpConvUint64ToInt: + width = 32; break; case glslang::EOpConvInt8ToUint64: - convOp = spv::OpSConvert; - type = builder.makeIntType(64); - break; - case glslang::EOpConvInt16ToUint8: - convOp = spv::OpSConvert; - type = builder.makeIntType(8); - break; - case glslang::EOpConvInt16ToUint: - convOp = spv::OpSConvert; - type = builder.makeIntType(32); - break; case glslang::EOpConvInt16ToUint64: - convOp = spv::OpSConvert; - type = builder.makeIntType(64); - break; - case glslang::EOpConvIntToUint8: - convOp = spv::OpSConvert; - type = builder.makeIntType(8); - break; - case glslang::EOpConvIntToUint16: - convOp = spv::OpSConvert; - type = builder.makeIntType(16); - break; case glslang::EOpConvIntToUint64: - convOp = spv::OpSConvert; - type = builder.makeIntType(64); - break; - case glslang::EOpConvInt64ToUint8: - convOp = spv::OpSConvert; - type = builder.makeIntType(8); - break; - case glslang::EOpConvInt64ToUint16: - convOp = spv::OpSConvert; - type = builder.makeIntType(16); - break; - case glslang::EOpConvInt64ToUint: - convOp = spv::OpSConvert; - type = builder.makeIntType(32); - break; - case glslang::EOpConvUint8ToInt16: - convOp = spv::OpUConvert; - type = builder.makeIntType(16); - break; - case glslang::EOpConvUint8ToInt: - convOp = spv::OpUConvert; - type = builder.makeIntType(32); - break; case glslang::EOpConvUint8ToInt64: - convOp = spv::OpUConvert; - type = builder.makeIntType(64); - break; - case glslang::EOpConvUint16ToInt8: - convOp = spv::OpUConvert; - type = builder.makeIntType(8); - break; - case glslang::EOpConvUint16ToInt: - convOp = spv::OpUConvert; - type = builder.makeIntType(32); - break; case glslang::EOpConvUint16ToInt64: - convOp = spv::OpUConvert; - type = builder.makeIntType(64); - break; - case glslang::EOpConvUintToInt8: - convOp = spv::OpUConvert; - type = builder.makeIntType(8); - break; - case glslang::EOpConvUintToInt16: - convOp = spv::OpUConvert; - type = builder.makeIntType(16); - break; case glslang::EOpConvUintToInt64: - convOp = spv::OpUConvert; - type = builder.makeIntType(64); - break; - case glslang::EOpConvUint64ToInt8: - convOp = spv::OpUConvert; - type = builder.makeIntType(8); - break; - case glslang::EOpConvUint64ToInt16: - convOp = spv::OpUConvert; - type = builder.makeIntType(16); - break; - case glslang::EOpConvUint64ToInt: - convOp = spv::OpUConvert; - type = builder.makeIntType(32); + width = 64; break; default: @@ -4940,11 +4876,36 @@ spv::Id TGlslangToSpvTraverser::createConversionOperation(glslang::TOperator op, break; } + // Get the conversion operation and result type, + // based on the target width, but the source type. + spv::Id type = spv::NoType; + spv::Op convOp = spv::OpNop; + switch(op) { + case glslang::EOpConvInt8ToUint16: + case glslang::EOpConvInt8ToUint: + case glslang::EOpConvInt8ToUint64: + case glslang::EOpConvInt16ToUint8: + case glslang::EOpConvInt16ToUint: + case glslang::EOpConvInt16ToUint64: + case glslang::EOpConvIntToUint8: + case glslang::EOpConvIntToUint16: + case glslang::EOpConvIntToUint64: + case glslang::EOpConvInt64ToUint8: + case glslang::EOpConvInt64ToUint16: + case glslang::EOpConvInt64ToUint: + convOp = spv::OpSConvert; + type = builder.makeIntType(width); + break; + default: + convOp = spv::OpUConvert; + type = builder.makeUintType(width); + break; + } + if (vectorSize > 0) type = builder.makeVectorType(type, vectorSize); - result = builder.createUnaryOp(convOp, type, operand); - return result; + return builder.createUnaryOp(convOp, type, operand); } spv::Id TGlslangToSpvTraverser::createConversion(glslang::TOperator op, OpDecorations& decorations, spv::Id destType, @@ -5219,7 +5180,7 @@ spv::Id TGlslangToSpvTraverser::createConversion(glslang::TOperator op, OpDecora case glslang::EOpConvUint64ToInt16: case glslang::EOpConvUint64ToInt: // OpSConvert/OpUConvert + OpBitCast - operand = createConversionOperation(op, operand, vectorSize); + operand = createIntWidthConversion(op, operand, vectorSize); if (builder.isInSpecConstCodeGenMode()) { // Build zero scalar or vector for OpIAdd. diff --git a/Test/baseResults/spv.explicittypes.frag.out b/Test/baseResults/spv.explicittypes.frag.out index d7975b50..6f7f2b9e 100755 --- a/Test/baseResults/spv.explicittypes.frag.out +++ b/Test/baseResults/spv.explicittypes.frag.out @@ -51,13 +51,13 @@ spv.explicittypes.frag Name 133 "u8v" Name 136 "i8v" Name 141 "i16v" - Name 149 "i32v" - Name 157 "u32v" - Name 163 "i64v" - Name 168 "u64v" - Name 182 "f16v" - Name 188 "f32v" - Name 194 "f64v" + Name 150 "i32v" + Name 158 "u32v" + Name 164 "i64v" + Name 169 "u64v" + Name 183 "f16v" + Name 189 "f32v" + Name 195 "f64v" Name 222 "u16v" Name 252 "bv" Name 268 "i32v" @@ -212,25 +212,25 @@ spv.explicittypes.frag 135: TypePointer Function 134(i8vec2) 139: TypeVector 77(int16_t) 2 140: TypePointer Function 139(i16vec2) - 147: TypeVector 29(int) 2 - 148: TypePointer Function 147(ivec2) - 155: TypeVector 19(int) 2 - 156: TypePointer Function 155(ivec2) - 161: TypeVector 16(int64_t) 2 - 162: TypePointer Function 161(i64vec2) - 166: TypeVector 38(int64_t) 2 - 167: TypePointer Function 166(i64vec2) - 179: TypeFloat 16 - 180: TypeVector 179(float16_t) 2 - 181: TypePointer Function 180(f16vec2) - 185: TypeFloat 32 - 186: TypeVector 185(float) 2 - 187: TypePointer Function 186(fvec2) - 191: TypeFloat 64 - 192: TypeVector 191(float64_t) 2 - 193: TypePointer Function 192(f64vec2) - 220: TypeVector 91(int16_t) 2 - 221: TypePointer Function 220(i16vec2) + 145: TypeVector 91(int16_t) 2 + 148: TypeVector 29(int) 2 + 149: TypePointer Function 148(ivec2) + 154: TypeVector 19(int) 2 + 157: TypePointer Function 154(ivec2) + 162: TypeVector 16(int64_t) 2 + 163: TypePointer Function 162(i64vec2) + 167: TypeVector 38(int64_t) 2 + 168: TypePointer Function 167(i64vec2) + 180: TypeFloat 16 + 181: TypeVector 180(float16_t) 2 + 182: TypePointer Function 181(f16vec2) + 186: TypeFloat 32 + 187: TypeVector 186(float) 2 + 188: TypePointer Function 187(fvec2) + 192: TypeFloat 64 + 193: TypeVector 192(float64_t) 2 + 194: TypePointer Function 193(f64vec2) + 221: TypePointer Function 145(i16vec2) 249: TypeBool 250: TypeVector 249(bool) 2 251: TypePointer Function 250(bvec2) @@ -247,23 +247,23 @@ spv.explicittypes.frag 368:139(i16vec2) ConstantComposite 366 366 371: 91(int16_t) Constant 0 372: 91(int16_t) Constant 1 - 373:220(i16vec2) ConstantComposite 371 371 - 374:220(i16vec2) ConstantComposite 372 372 + 373:145(i16vec2) ConstantComposite 371 371 + 374:145(i16vec2) ConstantComposite 372 372 467: 29(int) Constant 1 - 468: 147(ivec2) ConstantComposite 30 30 - 469: 147(ivec2) ConstantComposite 467 467 + 468: 148(ivec2) ConstantComposite 30 30 + 469: 148(ivec2) ConstantComposite 467 467 472: 19(int) Constant 0 473: 19(int) Constant 1 - 474: 155(ivec2) ConstantComposite 472 472 - 475: 155(ivec2) ConstantComposite 473 473 + 474: 154(ivec2) ConstantComposite 472 472 + 475: 154(ivec2) ConstantComposite 473 473 550: 16(int64_t) Constant 0 0 551: 16(int64_t) Constant 1 0 - 552:161(i64vec2) ConstantComposite 550 550 - 553:161(i64vec2) ConstantComposite 551 551 + 552:162(i64vec2) ConstantComposite 550 550 + 553:162(i64vec2) ConstantComposite 551 551 556: 38(int64_t) Constant 0 0 557: 38(int64_t) Constant 1 0 - 558:166(i64vec2) ConstantComposite 556 556 - 559:166(i64vec2) ConstantComposite 557 557 + 558:167(i64vec2) ConstantComposite 556 556 + 559:167(i64vec2) ConstantComposite 557 557 565: TypeVector 77(int16_t) 3 566: TypeVector 77(int16_t) 4 567: TypeVector 91(int16_t) 3 @@ -272,7 +272,7 @@ spv.explicittypes.frag 570: TypeVector 29(int) 4 571: TypeVector 19(int) 3 572: TypeVector 19(int) 4 - 573(Block): TypeStruct 77(int16_t) 139(i16vec2) 565(i16vec3) 566(i16vec4) 91(int16_t) 220(i16vec2) 567(i16vec3) 568(i16vec4) 29(int) 147(ivec2) 569(ivec3) 570(ivec4) 19(int) 155(ivec2) 571(ivec3) 572(ivec4) + 573(Block): TypeStruct 77(int16_t) 139(i16vec2) 565(i16vec3) 566(i16vec4) 91(int16_t) 145(i16vec2) 567(i16vec3) 568(i16vec4) 29(int) 148(ivec2) 569(ivec3) 570(ivec4) 19(int) 154(ivec2) 571(ivec3) 572(ivec4) 574: TypePointer Uniform 573(Block) 575(block): 574(ptr) Variable Uniform 4(main): 2 Function None 3 @@ -352,13 +352,13 @@ spv.explicittypes.frag 133(u8v): 132(ptr) Variable Function 136(i8v): 135(ptr) Variable Function 141(i16v): 140(ptr) Variable Function - 149(i32v): 148(ptr) Variable Function - 157(u32v): 156(ptr) Variable Function - 163(i64v): 162(ptr) Variable Function - 168(u64v): 167(ptr) Variable Function - 182(f16v): 181(ptr) Variable Function - 188(f32v): 187(ptr) Variable Function - 194(f64v): 193(ptr) Variable Function + 150(i32v): 149(ptr) Variable Function + 158(u32v): 157(ptr) Variable Function + 164(i64v): 163(ptr) Variable Function + 169(u64v): 168(ptr) Variable Function + 183(f16v): 182(ptr) Variable Function + 189(f32v): 188(ptr) Variable Function + 195(f64v): 194(ptr) Variable Function 222(u16v): 221(ptr) Variable Function 252(bv): 251(ptr) Variable Function 137: 134(i8vec2) Load 136(i8v) @@ -368,116 +368,116 @@ spv.explicittypes.frag 143:139(i16vec2) SConvert 142 Store 141(i16v) 143 144: 131(i8vec2) Load 133(u8v) - 145:139(i16vec2) UConvert 144 - 146:139(i16vec2) Bitcast 145 - Store 141(i16v) 146 - 150: 134(i8vec2) Load 136(i8v) - 151: 147(ivec2) SConvert 150 - Store 149(i32v) 151 - 152: 131(i8vec2) Load 133(u8v) - 153: 147(ivec2) UConvert 152 - 154: 147(ivec2) Bitcast 153 - Store 149(i32v) 154 - 158: 134(i8vec2) Load 136(i8v) - 159: 147(ivec2) SConvert 158 - 160: 155(ivec2) Bitcast 159 - Store 157(u32v) 160 - 164: 134(i8vec2) Load 136(i8v) - 165:161(i64vec2) SConvert 164 - Store 163(i64v) 165 - 169: 134(i8vec2) Load 136(i8v) - 170:161(i64vec2) SConvert 169 - 171:166(i64vec2) Bitcast 170 - Store 168(u64v) 171 - 172: 131(i8vec2) Load 133(u8v) - 173: 155(ivec2) UConvert 172 - Store 157(u32v) 173 - 174: 131(i8vec2) Load 133(u8v) - 175:161(i64vec2) UConvert 174 - 176:161(i64vec2) Bitcast 175 - Store 163(i64v) 176 - 177: 131(i8vec2) Load 133(u8v) - 178:166(i64vec2) UConvert 177 - Store 168(u64v) 178 - 183: 134(i8vec2) Load 136(i8v) - 184:180(f16vec2) ConvertSToF 183 - Store 182(f16v) 184 - 189: 134(i8vec2) Load 136(i8v) - 190: 186(fvec2) ConvertSToF 189 - Store 188(f32v) 190 - 195: 134(i8vec2) Load 136(i8v) - 196:192(f64vec2) ConvertSToF 195 - Store 194(f64v) 196 - 197: 131(i8vec2) Load 133(u8v) - 198:180(f16vec2) ConvertUToF 197 - Store 182(f16v) 198 - 199: 131(i8vec2) Load 133(u8v) - 200: 186(fvec2) ConvertUToF 199 - Store 188(f32v) 200 - 201: 131(i8vec2) Load 133(u8v) - 202:192(f64vec2) ConvertUToF 201 - Store 194(f64v) 202 - 203: 131(i8vec2) Load 133(u8v) - 204: 134(i8vec2) Bitcast 203 - Store 136(i8v) 204 - 205: 134(i8vec2) Load 136(i8v) - 206:139(i16vec2) SConvert 205 - Store 141(i16v) 206 - 207: 131(i8vec2) Load 133(u8v) - 208:139(i16vec2) UConvert 207 - 209:139(i16vec2) Bitcast 208 - Store 141(i16v) 209 - 210: 134(i8vec2) Load 136(i8v) - 211: 147(ivec2) SConvert 210 - Store 149(i32v) 211 - 212: 131(i8vec2) Load 133(u8v) - 213: 147(ivec2) UConvert 212 - 214: 147(ivec2) Bitcast 213 - Store 149(i32v) 214 - 215: 134(i8vec2) Load 136(i8v) - 216:161(i64vec2) SConvert 215 - Store 163(i64v) 216 - 217: 134(i8vec2) Load 136(i8v) - 218:161(i64vec2) SConvert 217 - 219:166(i64vec2) Bitcast 218 - Store 168(u64v) 219 + 146:145(i16vec2) UConvert 144 + 147:139(i16vec2) Bitcast 146 + Store 141(i16v) 147 + 151: 134(i8vec2) Load 136(i8v) + 152: 148(ivec2) SConvert 151 + Store 150(i32v) 152 + 153: 131(i8vec2) Load 133(u8v) + 155: 154(ivec2) UConvert 153 + 156: 148(ivec2) Bitcast 155 + Store 150(i32v) 156 + 159: 134(i8vec2) Load 136(i8v) + 160: 148(ivec2) SConvert 159 + 161: 154(ivec2) Bitcast 160 + Store 158(u32v) 161 + 165: 134(i8vec2) Load 136(i8v) + 166:162(i64vec2) SConvert 165 + Store 164(i64v) 166 + 170: 134(i8vec2) Load 136(i8v) + 171:162(i64vec2) SConvert 170 + 172:167(i64vec2) Bitcast 171 + Store 169(u64v) 172 + 173: 131(i8vec2) Load 133(u8v) + 174: 154(ivec2) UConvert 173 + Store 158(u32v) 174 + 175: 131(i8vec2) Load 133(u8v) + 176:167(i64vec2) UConvert 175 + 177:162(i64vec2) Bitcast 176 + Store 164(i64v) 177 + 178: 131(i8vec2) Load 133(u8v) + 179:167(i64vec2) UConvert 178 + Store 169(u64v) 179 + 184: 134(i8vec2) Load 136(i8v) + 185:181(f16vec2) ConvertSToF 184 + Store 183(f16v) 185 + 190: 134(i8vec2) Load 136(i8v) + 191: 187(fvec2) ConvertSToF 190 + Store 189(f32v) 191 + 196: 134(i8vec2) Load 136(i8v) + 197:193(f64vec2) ConvertSToF 196 + Store 195(f64v) 197 + 198: 131(i8vec2) Load 133(u8v) + 199:181(f16vec2) ConvertUToF 198 + Store 183(f16v) 199 + 200: 131(i8vec2) Load 133(u8v) + 201: 187(fvec2) ConvertUToF 200 + Store 189(f32v) 201 + 202: 131(i8vec2) Load 133(u8v) + 203:193(f64vec2) ConvertUToF 202 + Store 195(f64v) 203 + 204: 131(i8vec2) Load 133(u8v) + 205: 134(i8vec2) Bitcast 204 + Store 136(i8v) 205 + 206: 134(i8vec2) Load 136(i8v) + 207:139(i16vec2) SConvert 206 + Store 141(i16v) 207 + 208: 131(i8vec2) Load 133(u8v) + 209:145(i16vec2) UConvert 208 + 210:139(i16vec2) Bitcast 209 + Store 141(i16v) 210 + 211: 134(i8vec2) Load 136(i8v) + 212: 148(ivec2) SConvert 211 + Store 150(i32v) 212 + 213: 131(i8vec2) Load 133(u8v) + 214: 154(ivec2) UConvert 213 + 215: 148(ivec2) Bitcast 214 + Store 150(i32v) 215 + 216: 134(i8vec2) Load 136(i8v) + 217:162(i64vec2) SConvert 216 + Store 164(i64v) 217 + 218: 134(i8vec2) Load 136(i8v) + 219:162(i64vec2) SConvert 218 + 220:167(i64vec2) Bitcast 219 + Store 169(u64v) 220 223: 134(i8vec2) Load 136(i8v) 224:139(i16vec2) SConvert 223 - 225:220(i16vec2) Bitcast 224 + 225:145(i16vec2) Bitcast 224 Store 222(u16v) 225 226: 131(i8vec2) Load 133(u8v) - 227:220(i16vec2) UConvert 226 + 227:145(i16vec2) UConvert 226 Store 222(u16v) 227 228: 131(i8vec2) Load 133(u8v) - 229: 155(ivec2) UConvert 228 - Store 157(u32v) 229 + 229: 154(ivec2) UConvert 228 + Store 158(u32v) 229 230: 131(i8vec2) Load 133(u8v) - 231:161(i64vec2) UConvert 230 - 232:161(i64vec2) Bitcast 231 - Store 163(i64v) 232 + 231:167(i64vec2) UConvert 230 + 232:162(i64vec2) Bitcast 231 + Store 164(i64v) 232 233: 131(i8vec2) Load 133(u8v) - 234:161(i64vec2) UConvert 233 - 235:161(i64vec2) Bitcast 234 - 236:166(i64vec2) Bitcast 235 - Store 168(u64v) 236 + 234:167(i64vec2) UConvert 233 + 235:162(i64vec2) Bitcast 234 + 236:167(i64vec2) Bitcast 235 + Store 169(u64v) 236 237: 134(i8vec2) Load 136(i8v) - 238:180(f16vec2) ConvertSToF 237 - Store 182(f16v) 238 + 238:181(f16vec2) ConvertSToF 237 + Store 183(f16v) 238 239: 134(i8vec2) Load 136(i8v) - 240: 186(fvec2) ConvertSToF 239 - Store 188(f32v) 240 + 240: 187(fvec2) ConvertSToF 239 + Store 189(f32v) 240 241: 134(i8vec2) Load 136(i8v) - 242:192(f64vec2) ConvertSToF 241 - Store 194(f64v) 242 + 242:193(f64vec2) ConvertSToF 241 + Store 195(f64v) 242 243: 131(i8vec2) Load 133(u8v) - 244:180(f16vec2) ConvertUToF 243 - Store 182(f16v) 244 + 244:181(f16vec2) ConvertUToF 243 + Store 183(f16v) 244 245: 131(i8vec2) Load 133(u8v) - 246: 186(fvec2) ConvertUToF 245 - Store 188(f32v) 246 + 246: 187(fvec2) ConvertUToF 245 + Store 189(f32v) 246 247: 131(i8vec2) Load 133(u8v) - 248:192(f64vec2) ConvertUToF 247 - Store 194(f64v) 248 + 248:193(f64vec2) ConvertUToF 247 + Store 195(f64v) 248 253: 250(bvec2) Load 252(bv) 257: 134(i8vec2) Select 253 256 255 Store 136(i8v) 257 @@ -494,388 +494,388 @@ spv.explicittypes.frag FunctionEnd 10(typeCast16(): 2 Function None 3 11: Label - 268(i32v): 148(ptr) Variable Function + 268(i32v): 149(ptr) Variable Function 269(i16v): 140(ptr) Variable Function 272(u16v): 221(ptr) Variable Function - 278(u32v): 156(ptr) Variable Function - 282(i64v): 162(ptr) Variable Function - 285(u64v): 167(ptr) Variable Function - 296(f16v): 181(ptr) Variable Function - 299(f32v): 187(ptr) Variable Function - 302(f64v): 193(ptr) Variable Function + 278(u32v): 157(ptr) Variable Function + 282(i64v): 163(ptr) Variable Function + 285(u64v): 168(ptr) Variable Function + 296(f16v): 182(ptr) Variable Function + 299(f32v): 188(ptr) Variable Function + 302(f64v): 194(ptr) Variable Function 347(i8v): 135(ptr) Variable Function 353(u8v): 132(ptr) Variable Function 363(bv): 251(ptr) Variable Function 270:139(i16vec2) Load 269(i16v) - 271: 147(ivec2) SConvert 270 + 271: 148(ivec2) SConvert 270 Store 268(i32v) 271 - 273:220(i16vec2) Load 272(u16v) - 274: 147(ivec2) UConvert 273 - 275: 147(ivec2) Bitcast 274 + 273:145(i16vec2) Load 272(u16v) + 274: 154(ivec2) UConvert 273 + 275: 148(ivec2) Bitcast 274 Store 268(i32v) 275 276:139(i16vec2) Load 269(i16v) - 277:220(i16vec2) Bitcast 276 + 277:145(i16vec2) Bitcast 276 Store 272(u16v) 277 279:139(i16vec2) Load 269(i16v) - 280: 147(ivec2) SConvert 279 - 281: 155(ivec2) Bitcast 280 + 280: 148(ivec2) SConvert 279 + 281: 154(ivec2) Bitcast 280 Store 278(u32v) 281 283:139(i16vec2) Load 269(i16v) - 284:161(i64vec2) SConvert 283 + 284:162(i64vec2) SConvert 283 Store 282(i64v) 284 286:139(i16vec2) Load 269(i16v) - 287:161(i64vec2) SConvert 286 - 288:166(i64vec2) Bitcast 287 + 287:162(i64vec2) SConvert 286 + 288:167(i64vec2) Bitcast 287 Store 285(u64v) 288 - 289:220(i16vec2) Load 272(u16v) - 290: 155(ivec2) UConvert 289 + 289:145(i16vec2) Load 272(u16v) + 290: 154(ivec2) UConvert 289 Store 278(u32v) 290 - 291:220(i16vec2) Load 272(u16v) - 292:161(i64vec2) UConvert 291 - 293:161(i64vec2) Bitcast 292 + 291:145(i16vec2) Load 272(u16v) + 292:167(i64vec2) UConvert 291 + 293:162(i64vec2) Bitcast 292 Store 282(i64v) 293 - 294:220(i16vec2) Load 272(u16v) - 295:166(i64vec2) UConvert 294 + 294:145(i16vec2) Load 272(u16v) + 295:167(i64vec2) UConvert 294 Store 285(u64v) 295 297:139(i16vec2) Load 269(i16v) - 298:180(f16vec2) ConvertSToF 297 + 298:181(f16vec2) ConvertSToF 297 Store 296(f16v) 298 300:139(i16vec2) Load 269(i16v) - 301: 186(fvec2) ConvertSToF 300 + 301: 187(fvec2) ConvertSToF 300 Store 299(f32v) 301 303:139(i16vec2) Load 269(i16v) - 304:192(f64vec2) ConvertSToF 303 + 304:193(f64vec2) ConvertSToF 303 Store 302(f64v) 304 - 305:220(i16vec2) Load 272(u16v) - 306:180(f16vec2) ConvertUToF 305 + 305:145(i16vec2) Load 272(u16v) + 306:181(f16vec2) ConvertUToF 305 Store 296(f16v) 306 - 307:220(i16vec2) Load 272(u16v) - 308: 186(fvec2) ConvertUToF 307 + 307:145(i16vec2) Load 272(u16v) + 308: 187(fvec2) ConvertUToF 307 Store 299(f32v) 308 - 309:220(i16vec2) Load 272(u16v) - 310:192(f64vec2) ConvertUToF 309 + 309:145(i16vec2) Load 272(u16v) + 310:193(f64vec2) ConvertUToF 309 Store 302(f64v) 310 311:139(i16vec2) Load 269(i16v) - 312: 147(ivec2) SConvert 311 + 312: 148(ivec2) SConvert 311 Store 268(i32v) 312 - 313:220(i16vec2) Load 272(u16v) - 314: 147(ivec2) UConvert 313 - 315: 147(ivec2) Bitcast 314 + 313:145(i16vec2) Load 272(u16v) + 314: 154(ivec2) UConvert 313 + 315: 148(ivec2) Bitcast 314 Store 268(i32v) 315 316:139(i16vec2) Load 269(i16v) - 317:220(i16vec2) Bitcast 316 + 317:145(i16vec2) Bitcast 316 Store 272(u16v) 317 318:139(i16vec2) Load 269(i16v) - 319: 147(ivec2) SConvert 318 - 320: 155(ivec2) Bitcast 319 + 319: 148(ivec2) SConvert 318 + 320: 154(ivec2) Bitcast 319 Store 278(u32v) 320 321:139(i16vec2) Load 269(i16v) - 322:161(i64vec2) SConvert 321 + 322:162(i64vec2) SConvert 321 Store 282(i64v) 322 323:139(i16vec2) Load 269(i16v) - 324:161(i64vec2) SConvert 323 - 325:166(i64vec2) Bitcast 324 + 324:162(i64vec2) SConvert 323 + 325:167(i64vec2) Bitcast 324 Store 285(u64v) 325 - 326:220(i16vec2) Load 272(u16v) - 327: 155(ivec2) UConvert 326 + 326:145(i16vec2) Load 272(u16v) + 327: 154(ivec2) UConvert 326 Store 278(u32v) 327 - 328:220(i16vec2) Load 272(u16v) - 329:161(i64vec2) UConvert 328 - 330:161(i64vec2) Bitcast 329 + 328:145(i16vec2) Load 272(u16v) + 329:167(i64vec2) UConvert 328 + 330:162(i64vec2) Bitcast 329 Store 282(i64v) 330 - 331:220(i16vec2) Load 272(u16v) - 332:161(i64vec2) UConvert 331 - 333:161(i64vec2) Bitcast 332 - 334:166(i64vec2) Bitcast 333 + 331:145(i16vec2) Load 272(u16v) + 332:167(i64vec2) UConvert 331 + 333:162(i64vec2) Bitcast 332 + 334:167(i64vec2) Bitcast 333 Store 285(u64v) 334 335:139(i16vec2) Load 269(i16v) - 336:180(f16vec2) ConvertSToF 335 + 336:181(f16vec2) ConvertSToF 335 Store 296(f16v) 336 337:139(i16vec2) Load 269(i16v) - 338: 186(fvec2) ConvertSToF 337 + 338: 187(fvec2) ConvertSToF 337 Store 299(f32v) 338 339:139(i16vec2) Load 269(i16v) - 340:192(f64vec2) ConvertSToF 339 + 340:193(f64vec2) ConvertSToF 339 Store 302(f64v) 340 - 341:220(i16vec2) Load 272(u16v) - 342:180(f16vec2) ConvertUToF 341 + 341:145(i16vec2) Load 272(u16v) + 342:181(f16vec2) ConvertUToF 341 Store 296(f16v) 342 - 343:220(i16vec2) Load 272(u16v) - 344: 186(fvec2) ConvertUToF 343 + 343:145(i16vec2) Load 272(u16v) + 344: 187(fvec2) ConvertUToF 343 Store 299(f32v) 344 - 345:220(i16vec2) Load 272(u16v) - 346:192(f64vec2) ConvertUToF 345 + 345:145(i16vec2) Load 272(u16v) + 346:193(f64vec2) ConvertUToF 345 Store 302(f64v) 346 348:139(i16vec2) Load 269(i16v) 349: 134(i8vec2) SConvert 348 Store 347(i8v) 349 - 350:220(i16vec2) Load 272(u16v) - 351: 134(i8vec2) UConvert 350 + 350:145(i16vec2) Load 272(u16v) + 351: 131(i8vec2) UConvert 350 352: 134(i8vec2) Bitcast 351 Store 347(i8v) 352 354:139(i16vec2) Load 269(i16v) 355: 134(i8vec2) SConvert 354 356: 131(i8vec2) Bitcast 355 Store 353(u8v) 356 - 357:220(i16vec2) Load 272(u16v) + 357:145(i16vec2) Load 272(u16v) 358: 131(i8vec2) UConvert 357 Store 353(u8v) 358 - 359:220(i16vec2) Load 272(u16v) + 359:145(i16vec2) Load 272(u16v) 360: 131(i8vec2) UConvert 359 - 361:139(i16vec2) UConvert 360 + 361:145(i16vec2) UConvert 360 362:139(i16vec2) Bitcast 361 Store 269(i16v) 362 364: 250(bvec2) Load 363(bv) 369:139(i16vec2) Select 364 368 367 Store 269(i16v) 369 370: 250(bvec2) Load 363(bv) - 375:220(i16vec2) Select 370 374 373 + 375:145(i16vec2) Select 370 374 373 Store 272(u16v) 375 376:139(i16vec2) Load 269(i16v) 377: 250(bvec2) INotEqual 376 373 Store 363(bv) 377 - 378:220(i16vec2) Load 272(u16v) + 378:145(i16vec2) Load 272(u16v) 379: 250(bvec2) INotEqual 378 373 Store 363(bv) 379 Return FunctionEnd 12(typeCast32(): 2 Function None 3 13: Label - 380(u32v): 156(ptr) Variable Function - 381(i32v): 148(ptr) Variable Function - 384(i64v): 162(ptr) Variable Function - 387(u64v): 167(ptr) Variable Function - 396(f32v): 187(ptr) Variable Function - 399(f64v): 193(ptr) Variable Function + 380(u32v): 157(ptr) Variable Function + 381(i32v): 149(ptr) Variable Function + 384(i64v): 163(ptr) Variable Function + 387(u64v): 168(ptr) Variable Function + 396(f32v): 188(ptr) Variable Function + 399(f64v): 194(ptr) Variable Function 406(i8v): 135(ptr) Variable Function 412(i16v): 140(ptr) Variable Function 429(u8v): 132(ptr) Variable Function 435(u16v): 221(ptr) Variable Function - 452(f16v): 181(ptr) Variable Function + 452(f16v): 182(ptr) Variable Function 465(bv): 251(ptr) Variable Function - 382: 147(ivec2) Load 381(i32v) - 383: 155(ivec2) Bitcast 382 + 382: 148(ivec2) Load 381(i32v) + 383: 154(ivec2) Bitcast 382 Store 380(u32v) 383 - 385: 147(ivec2) Load 381(i32v) - 386:161(i64vec2) SConvert 385 + 385: 148(ivec2) Load 381(i32v) + 386:162(i64vec2) SConvert 385 Store 384(i64v) 386 - 388: 147(ivec2) Load 381(i32v) - 389:161(i64vec2) SConvert 388 - 390:166(i64vec2) Bitcast 389 + 388: 148(ivec2) Load 381(i32v) + 389:162(i64vec2) SConvert 388 + 390:167(i64vec2) Bitcast 389 Store 387(u64v) 390 - 391: 155(ivec2) Load 380(u32v) - 392:161(i64vec2) UConvert 391 - 393:161(i64vec2) Bitcast 392 + 391: 154(ivec2) Load 380(u32v) + 392:167(i64vec2) UConvert 391 + 393:162(i64vec2) Bitcast 392 Store 384(i64v) 393 - 394: 155(ivec2) Load 380(u32v) - 395:166(i64vec2) UConvert 394 + 394: 154(ivec2) Load 380(u32v) + 395:167(i64vec2) UConvert 394 Store 387(u64v) 395 - 397: 147(ivec2) Load 381(i32v) - 398: 186(fvec2) ConvertSToF 397 + 397: 148(ivec2) Load 381(i32v) + 398: 187(fvec2) ConvertSToF 397 Store 396(f32v) 398 - 400: 147(ivec2) Load 381(i32v) - 401:192(f64vec2) ConvertSToF 400 + 400: 148(ivec2) Load 381(i32v) + 401:193(f64vec2) ConvertSToF 400 Store 399(f64v) 401 - 402: 155(ivec2) Load 380(u32v) - 403: 186(fvec2) ConvertUToF 402 + 402: 154(ivec2) Load 380(u32v) + 403: 187(fvec2) ConvertUToF 402 Store 396(f32v) 403 - 404: 155(ivec2) Load 380(u32v) - 405:192(f64vec2) ConvertUToF 404 + 404: 154(ivec2) Load 380(u32v) + 405:193(f64vec2) ConvertUToF 404 Store 399(f64v) 405 - 407: 147(ivec2) Load 381(i32v) + 407: 148(ivec2) Load 381(i32v) 408: 134(i8vec2) SConvert 407 Store 406(i8v) 408 - 409: 155(ivec2) Load 380(u32v) - 410: 134(i8vec2) UConvert 409 + 409: 154(ivec2) Load 380(u32v) + 410: 131(i8vec2) UConvert 409 411: 134(i8vec2) Bitcast 410 Store 406(i8v) 411 - 413: 147(ivec2) Load 381(i32v) + 413: 148(ivec2) Load 381(i32v) 414:139(i16vec2) SConvert 413 Store 412(i16v) 414 - 415: 155(ivec2) Load 380(u32v) - 416:139(i16vec2) UConvert 415 + 415: 154(ivec2) Load 380(u32v) + 416:145(i16vec2) UConvert 415 417:139(i16vec2) Bitcast 416 Store 412(i16v) 417 - 418: 147(ivec2) Load 381(i32v) + 418: 148(ivec2) Load 381(i32v) 419: 29(int) CompositeExtract 418 0 420: 29(int) CompositeExtract 418 1 - 421: 147(ivec2) CompositeConstruct 419 420 + 421: 148(ivec2) CompositeConstruct 419 420 Store 381(i32v) 421 - 422: 155(ivec2) Load 380(u32v) - 423: 147(ivec2) Bitcast 422 + 422: 154(ivec2) Load 380(u32v) + 423: 148(ivec2) Bitcast 422 Store 381(i32v) 423 - 424: 147(ivec2) Load 381(i32v) - 425:161(i64vec2) SConvert 424 + 424: 148(ivec2) Load 381(i32v) + 425:162(i64vec2) SConvert 424 Store 384(i64v) 425 - 426: 155(ivec2) Load 380(u32v) - 427:161(i64vec2) UConvert 426 - 428:161(i64vec2) Bitcast 427 + 426: 154(ivec2) Load 380(u32v) + 427:167(i64vec2) UConvert 426 + 428:162(i64vec2) Bitcast 427 Store 384(i64v) 428 - 430: 147(ivec2) Load 381(i32v) + 430: 148(ivec2) Load 381(i32v) 431: 134(i8vec2) SConvert 430 432: 131(i8vec2) Bitcast 431 Store 429(u8v) 432 - 433: 155(ivec2) Load 380(u32v) + 433: 154(ivec2) Load 380(u32v) 434: 131(i8vec2) UConvert 433 Store 429(u8v) 434 - 436: 147(ivec2) Load 381(i32v) + 436: 148(ivec2) Load 381(i32v) 437:139(i16vec2) SConvert 436 - 438:220(i16vec2) Bitcast 437 + 438:145(i16vec2) Bitcast 437 Store 435(u16v) 438 - 439: 155(ivec2) Load 380(u32v) - 440:220(i16vec2) UConvert 439 + 439: 154(ivec2) Load 380(u32v) + 440:145(i16vec2) UConvert 439 Store 435(u16v) 440 - 441: 147(ivec2) Load 381(i32v) - 442: 155(ivec2) Bitcast 441 + 441: 148(ivec2) Load 381(i32v) + 442: 154(ivec2) Bitcast 441 Store 380(u32v) 442 - 443: 155(ivec2) Load 380(u32v) + 443: 154(ivec2) Load 380(u32v) 444: 19(int) CompositeExtract 443 0 445: 19(int) CompositeExtract 443 1 - 446: 155(ivec2) CompositeConstruct 444 445 + 446: 154(ivec2) CompositeConstruct 444 445 Store 380(u32v) 446 - 447: 147(ivec2) Load 381(i32v) - 448:161(i64vec2) SConvert 447 - 449:166(i64vec2) Bitcast 448 + 447: 148(ivec2) Load 381(i32v) + 448:162(i64vec2) SConvert 447 + 449:167(i64vec2) Bitcast 448 Store 387(u64v) 449 - 450: 155(ivec2) Load 380(u32v) - 451:166(i64vec2) UConvert 450 + 450: 154(ivec2) Load 380(u32v) + 451:167(i64vec2) UConvert 450 Store 387(u64v) 451 - 453: 147(ivec2) Load 381(i32v) - 454:180(f16vec2) ConvertSToF 453 + 453: 148(ivec2) Load 381(i32v) + 454:181(f16vec2) ConvertSToF 453 Store 452(f16v) 454 - 455: 147(ivec2) Load 381(i32v) - 456: 186(fvec2) ConvertSToF 455 + 455: 148(ivec2) Load 381(i32v) + 456: 187(fvec2) ConvertSToF 455 Store 396(f32v) 456 - 457: 147(ivec2) Load 381(i32v) - 458:192(f64vec2) ConvertSToF 457 + 457: 148(ivec2) Load 381(i32v) + 458:193(f64vec2) ConvertSToF 457 Store 399(f64v) 458 - 459: 155(ivec2) Load 380(u32v) - 460:180(f16vec2) ConvertUToF 459 + 459: 154(ivec2) Load 380(u32v) + 460:181(f16vec2) ConvertUToF 459 Store 452(f16v) 460 - 461: 155(ivec2) Load 380(u32v) - 462: 186(fvec2) ConvertUToF 461 + 461: 154(ivec2) Load 380(u32v) + 462: 187(fvec2) ConvertUToF 461 Store 396(f32v) 462 - 463: 155(ivec2) Load 380(u32v) - 464:192(f64vec2) ConvertUToF 463 + 463: 154(ivec2) Load 380(u32v) + 464:193(f64vec2) ConvertUToF 463 Store 399(f64v) 464 466: 250(bvec2) Load 465(bv) - 470: 147(ivec2) Select 466 469 468 + 470: 148(ivec2) Select 466 469 468 Store 381(i32v) 470 471: 250(bvec2) Load 465(bv) - 476: 155(ivec2) Select 471 475 474 + 476: 154(ivec2) Select 471 475 474 Store 380(u32v) 476 - 477: 147(ivec2) Load 381(i32v) + 477: 148(ivec2) Load 381(i32v) 478: 250(bvec2) INotEqual 477 474 Store 465(bv) 478 - 479: 155(ivec2) Load 380(u32v) + 479: 154(ivec2) Load 380(u32v) 480: 250(bvec2) INotEqual 479 474 Store 465(bv) 480 Return FunctionEnd 14(typeCast64(): 2 Function None 3 15: Label - 481(u64v): 167(ptr) Variable Function - 482(i64v): 162(ptr) Variable Function - 485(f64v): 193(ptr) Variable Function + 481(u64v): 168(ptr) Variable Function + 482(i64v): 163(ptr) Variable Function + 485(f64v): 194(ptr) Variable Function 490(i8v): 135(ptr) Variable Function 496(i16v): 140(ptr) Variable Function - 502(i32v): 148(ptr) Variable Function + 502(i32v): 149(ptr) Variable Function 510(u8v): 132(ptr) Variable Function 516(u16v): 221(ptr) Variable Function - 522(u32v): 156(ptr) Variable Function - 534(f16v): 181(ptr) Variable Function - 537(f32v): 187(ptr) Variable Function + 522(u32v): 157(ptr) Variable Function + 534(f16v): 182(ptr) Variable Function + 537(f32v): 188(ptr) Variable Function 548(bv): 251(ptr) Variable Function - 483:161(i64vec2) Load 482(i64v) - 484:166(i64vec2) Bitcast 483 + 483:162(i64vec2) Load 482(i64v) + 484:167(i64vec2) Bitcast 483 Store 481(u64v) 484 - 486:161(i64vec2) Load 482(i64v) - 487:192(f64vec2) ConvertSToF 486 + 486:162(i64vec2) Load 482(i64v) + 487:193(f64vec2) ConvertSToF 486 Store 485(f64v) 487 - 488:166(i64vec2) Load 481(u64v) - 489:192(f64vec2) ConvertUToF 488 + 488:167(i64vec2) Load 481(u64v) + 489:193(f64vec2) ConvertUToF 488 Store 485(f64v) 489 - 491:161(i64vec2) Load 482(i64v) + 491:162(i64vec2) Load 482(i64v) 492: 134(i8vec2) SConvert 491 Store 490(i8v) 492 - 493:166(i64vec2) Load 481(u64v) - 494: 134(i8vec2) UConvert 493 + 493:167(i64vec2) Load 481(u64v) + 494: 131(i8vec2) UConvert 493 495: 134(i8vec2) Bitcast 494 Store 490(i8v) 495 - 497:161(i64vec2) Load 482(i64v) + 497:162(i64vec2) Load 482(i64v) 498:139(i16vec2) SConvert 497 Store 496(i16v) 498 - 499:166(i64vec2) Load 481(u64v) - 500:139(i16vec2) UConvert 499 + 499:167(i64vec2) Load 481(u64v) + 500:145(i16vec2) UConvert 499 501:139(i16vec2) Bitcast 500 Store 496(i16v) 501 - 503:161(i64vec2) Load 482(i64v) - 504: 147(ivec2) SConvert 503 + 503:162(i64vec2) Load 482(i64v) + 504: 148(ivec2) SConvert 503 Store 502(i32v) 504 - 505:166(i64vec2) Load 481(u64v) - 506: 147(ivec2) UConvert 505 - 507: 147(ivec2) Bitcast 506 + 505:167(i64vec2) Load 481(u64v) + 506: 154(ivec2) UConvert 505 + 507: 148(ivec2) Bitcast 506 Store 502(i32v) 507 - 508:166(i64vec2) Load 481(u64v) - 509:161(i64vec2) Bitcast 508 + 508:167(i64vec2) Load 481(u64v) + 509:162(i64vec2) Bitcast 508 Store 482(i64v) 509 - 511:161(i64vec2) Load 482(i64v) + 511:162(i64vec2) Load 482(i64v) 512: 134(i8vec2) SConvert 511 513: 131(i8vec2) Bitcast 512 Store 510(u8v) 513 - 514:166(i64vec2) Load 481(u64v) + 514:167(i64vec2) Load 481(u64v) 515: 131(i8vec2) UConvert 514 Store 510(u8v) 515 - 517:161(i64vec2) Load 482(i64v) + 517:162(i64vec2) Load 482(i64v) 518:139(i16vec2) SConvert 517 - 519:220(i16vec2) Bitcast 518 + 519:145(i16vec2) Bitcast 518 Store 516(u16v) 519 - 520:166(i64vec2) Load 481(u64v) - 521:220(i16vec2) UConvert 520 + 520:167(i64vec2) Load 481(u64v) + 521:145(i16vec2) UConvert 520 Store 516(u16v) 521 - 523:161(i64vec2) Load 482(i64v) - 524: 147(ivec2) SConvert 523 - 525: 155(ivec2) Bitcast 524 + 523:162(i64vec2) Load 482(i64v) + 524: 148(ivec2) SConvert 523 + 525: 154(ivec2) Bitcast 524 Store 522(u32v) 525 - 526:166(i64vec2) Load 481(u64v) - 527: 155(ivec2) UConvert 526 + 526:167(i64vec2) Load 481(u64v) + 527: 154(ivec2) UConvert 526 Store 522(u32v) 527 - 528:161(i64vec2) Load 482(i64v) - 529:166(i64vec2) Bitcast 528 + 528:162(i64vec2) Load 482(i64v) + 529:167(i64vec2) Bitcast 528 Store 481(u64v) 529 - 530:166(i64vec2) Load 481(u64v) + 530:167(i64vec2) Load 481(u64v) 531: 38(int64_t) CompositeExtract 530 0 532: 38(int64_t) CompositeExtract 530 1 - 533:166(i64vec2) CompositeConstruct 531 532 + 533:167(i64vec2) CompositeConstruct 531 532 Store 481(u64v) 533 - 535:161(i64vec2) Load 482(i64v) - 536:180(f16vec2) ConvertSToF 535 + 535:162(i64vec2) Load 482(i64v) + 536:181(f16vec2) ConvertSToF 535 Store 534(f16v) 536 - 538:161(i64vec2) Load 482(i64v) - 539: 186(fvec2) ConvertSToF 538 + 538:162(i64vec2) Load 482(i64v) + 539: 187(fvec2) ConvertSToF 538 Store 537(f32v) 539 - 540:161(i64vec2) Load 482(i64v) - 541:192(f64vec2) ConvertSToF 540 + 540:162(i64vec2) Load 482(i64v) + 541:193(f64vec2) ConvertSToF 540 Store 485(f64v) 541 - 542:166(i64vec2) Load 481(u64v) - 543:180(f16vec2) ConvertUToF 542 + 542:167(i64vec2) Load 481(u64v) + 543:181(f16vec2) ConvertUToF 542 Store 534(f16v) 543 - 544:166(i64vec2) Load 481(u64v) - 545: 186(fvec2) ConvertUToF 544 + 544:167(i64vec2) Load 481(u64v) + 545: 187(fvec2) ConvertUToF 544 Store 537(f32v) 545 - 546:166(i64vec2) Load 481(u64v) - 547:192(f64vec2) ConvertUToF 546 + 546:167(i64vec2) Load 481(u64v) + 547:193(f64vec2) ConvertUToF 546 Store 485(f64v) 547 549: 250(bvec2) Load 548(bv) - 554:161(i64vec2) Select 549 553 552 + 554:162(i64vec2) Select 549 553 552 Store 482(i64v) 554 555: 250(bvec2) Load 548(bv) - 560:166(i64vec2) Select 555 559 558 + 560:167(i64vec2) Select 555 559 558 Store 481(u64v) 560 - 561:161(i64vec2) Load 482(i64v) + 561:162(i64vec2) Load 482(i64v) 562: 250(bvec2) INotEqual 561 558 Store 548(bv) 562 - 563:166(i64vec2) Load 481(u64v) + 563:167(i64vec2) Load 481(u64v) 564: 250(bvec2) INotEqual 563 558 Store 548(bv) 564 Return diff --git a/Test/baseResults/spv.int16.amd.frag.out b/Test/baseResults/spv.int16.amd.frag.out index c998e872..c404375b 100644 --- a/Test/baseResults/spv.int16.amd.frag.out +++ b/Test/baseResults/spv.int16.amd.frag.out @@ -143,8 +143,8 @@ spv.int16.amd.frag 205:198(i16vec2) ConstantComposite 203 203 211: TypeVector 28(int) 2 212: TypePointer Function 211(ivec2) - 224: TypeVector 18(int) 2 - 225: TypePointer Function 224(ivec2) + 222: TypeVector 18(int) 2 + 225: TypePointer Function 222(ivec2) 237: TypeFloat 32 238: TypeVector 237(float) 2 239: TypePointer Function 238(fvec2) @@ -157,9 +157,9 @@ spv.int16.amd.frag 273: TypeInt 64 1 274: TypeVector 273(int64_t) 2 275: TypePointer Function 274(i64vec2) - 287: TypeInt 64 0 - 288: TypeVector 287(int64_t) 2 - 289: TypePointer Function 288(i64vec2) + 285: TypeInt 64 0 + 286: TypeVector 285(int64_t) 2 + 289: TypePointer Function 286(i64vec2) 316: 17(int16_t) Constant 4294967295 317:187(i16vec2) ConstantComposite 316 316 326: 49(i16vec3) ConstantComposite 202 202 202 @@ -175,7 +175,7 @@ spv.int16.amd.frag 407: TypePointer Function 261(float16_t) 431: TypePointer Function 273(int64_t) 434: TypeVector 17(int16_t) 4 - 440: TypePointer Function 287(int64_t) + 440: TypePointer Function 285(int64_t) 443: TypeVector 14(int16_t) 4 449: TypePointer Function 388(bvec3) 515(Block): TypeStruct 54(i16vec3) 14(int16_t) @@ -186,7 +186,7 @@ spv.int16.amd.frag 520: TypePointer Input 17(int16_t) 521(ii16): 520(ptr) Variable Input 522(si64):273(int64_t) SpecConstant 4294967286 4294967295 - 523(su64):287(int64_t) SpecConstant 20 0 + 523(su64):285(int64_t) SpecConstant 20 0 524(si): 28(int) SpecConstant 4294967291 525(su): 18(int) SpecConstant 4 526(sb): 125(bool) SpecConstantTrue @@ -197,7 +197,7 @@ spv.int16.amd.frag 531: 17(int16_t) SpecConstantOp 169 526(sb) 53 194 532: 14(int16_t) SpecConstantOp 169 526(sb) 203 202 533: 28(int) SpecConstantOp 114 527(si16) - 534: 28(int) SpecConstantOp 113 528(su16) + 534: 18(int) SpecConstantOp 113 528(su16) 535: 28(int) SpecConstantOp 128 534 128 536: 17(int16_t) SpecConstantOp 114 524(si) 537: 17(int16_t) SpecConstantOp 114 524(si) @@ -205,20 +205,20 @@ spv.int16.amd.frag 539: 28(int) SpecConstantOp 114 527(si16) 540: 18(int) SpecConstantOp 128 539 128 541: 18(int) SpecConstantOp 113 528(su16) - 542: 17(int16_t) SpecConstantOp 113 525(su) + 542: 14(int16_t) SpecConstantOp 113 525(su) 543: 17(int16_t) SpecConstantOp 128 542 202 544: 14(int16_t) SpecConstantOp 113 525(su) 545:273(int64_t) SpecConstantOp 114 527(si16) - 546:273(int64_t) SpecConstantOp 113 528(su16) - 547:287(int64_t) Constant 0 0 + 546:285(int64_t) SpecConstantOp 113 528(su16) + 547:285(int64_t) Constant 0 0 548:273(int64_t) SpecConstantOp 128 546 547 549: 17(int16_t) SpecConstantOp 114 522(si64) 550: 17(int16_t) SpecConstantOp 114 522(si64) 551: 14(int16_t) SpecConstantOp 128 550 202 552:273(int64_t) SpecConstantOp 114 527(si16) - 553:287(int64_t) SpecConstantOp 128 552 547 - 554:287(int64_t) SpecConstantOp 113 528(su16) - 555: 17(int16_t) SpecConstantOp 113 523(su64) + 553:285(int64_t) SpecConstantOp 128 552 547 + 554:285(int64_t) SpecConstantOp 113 528(su16) + 555: 14(int16_t) SpecConstantOp 113 523(su64) 556: 17(int16_t) SpecConstantOp 128 555 202 557: 14(int16_t) SpecConstantOp 113 523(su64) 558: 14(int16_t) SpecConstantOp 128 527(si16) 202 @@ -450,22 +450,22 @@ spv.int16.amd.frag 220: 211(ivec2) SConvert 219 Store 213(iv) 220 221:198(i16vec2) Load 200(u16v) - 222: 211(ivec2) UConvert 221 - 223: 211(ivec2) Bitcast 222 - Store 213(iv) 223 - 227: 224(ivec2) Load 226(uv) - 228:187(i16vec2) UConvert 227 + 223: 222(ivec2) UConvert 221 + 224: 211(ivec2) Bitcast 223 + Store 213(iv) 224 + 227: 222(ivec2) Load 226(uv) + 228:198(i16vec2) UConvert 227 229:187(i16vec2) Bitcast 228 Store 189(i16v) 229 - 230: 224(ivec2) Load 226(uv) + 230: 222(ivec2) Load 226(uv) 231:198(i16vec2) UConvert 230 Store 200(u16v) 231 232:187(i16vec2) Load 189(i16v) 233: 211(ivec2) SConvert 232 - 234: 224(ivec2) Bitcast 233 + 234: 222(ivec2) Bitcast 233 Store 226(uv) 234 235:198(i16vec2) Load 200(u16v) - 236: 224(ivec2) UConvert 235 + 236: 222(ivec2) UConvert 235 Store 226(uv) 236 241: 238(fvec2) Load 240(fv) 242:187(i16vec2) ConvertFToS 241 @@ -514,22 +514,22 @@ spv.int16.amd.frag 283:274(i64vec2) SConvert 282 Store 276(i64v) 283 284:198(i16vec2) Load 200(u16v) - 285:274(i64vec2) UConvert 284 - 286:274(i64vec2) Bitcast 285 - Store 276(i64v) 286 - 291:288(i64vec2) Load 290(u64v) - 292:187(i16vec2) UConvert 291 + 287:286(i64vec2) UConvert 284 + 288:274(i64vec2) Bitcast 287 + Store 276(i64v) 288 + 291:286(i64vec2) Load 290(u64v) + 292:198(i16vec2) UConvert 291 293:187(i16vec2) Bitcast 292 Store 189(i16v) 293 - 294:288(i64vec2) Load 290(u64v) + 294:286(i64vec2) Load 290(u64v) 295:198(i16vec2) UConvert 294 Store 200(u16v) 295 296:187(i16vec2) Load 189(i16v) 297:274(i64vec2) SConvert 296 - 298:288(i64vec2) Bitcast 297 + 298:286(i64vec2) Bitcast 297 Store 290(u64v) 298 299:198(i16vec2) Load 200(u16v) - 300:288(i64vec2) UConvert 299 + 300:286(i64vec2) UConvert 299 Store 290(u64v) 300 301:198(i16vec2) Load 200(u16v) 302:187(i16vec2) Bitcast 301 @@ -696,9 +696,9 @@ spv.int16.amd.frag Store 305(i16v) 439 442: 14(int16_t) Load 321(u16) 444:443(i16vec4) CompositeConstruct 442 442 442 442 - 445:287(int64_t) Bitcast 444 + 445:285(int64_t) Bitcast 444 Store 441(packu64) 445 - 446:287(int64_t) Load 441(packu64) + 446:285(int64_t) Load 441(packu64) 447:443(i16vec4) Bitcast 446 448: 49(i16vec3) VectorShuffle 447 447 0 1 2 Store 319(u16v) 448 diff --git a/Test/baseResults/spv.int16.frag.out b/Test/baseResults/spv.int16.frag.out index 9f5c9017..84128ab4 100644 --- a/Test/baseResults/spv.int16.frag.out +++ b/Test/baseResults/spv.int16.frag.out @@ -128,8 +128,8 @@ spv.int16.frag 53: TypePointer Function 52(i16vec2) 57: TypeVector 36(int16_t) 2 58: TypePointer Function 57(i16vec2) - 65: TypeVector 17(int) 2 - 66: TypePointer Function 65(ivec2) + 61: TypeVector 17(int) 2 + 66: TypePointer Function 61(ivec2) 71: TypeInt 64 1 72: TypeVector 71(int64_t) 2 73: TypePointer Function 72(i64vec2) @@ -148,9 +148,9 @@ spv.int16.frag 151: TypeInt 8 1 152: TypeVector 151(int8_t) 2 153: TypePointer Function 152(i8vec2) - 160: TypeInt 8 0 - 161: TypeVector 160(int8_t) 2 - 162: TypePointer Function 161(i8vec2) + 158: TypeInt 8 0 + 159: TypeVector 158(int8_t) 2 + 162: TypePointer Function 159(i8vec2) 173: TypeBool 174: TypeVector 173(bool) 2 175: TypePointer Function 174(bvec2) @@ -235,15 +235,15 @@ spv.int16.frag 56: 49(ivec2) SConvert 55 Store 51(i32v) 56 60: 57(i16vec2) Load 59(u16v) - 61: 49(ivec2) UConvert 60 - 62: 49(ivec2) Bitcast 61 - Store 51(i32v) 62 - 63: 52(i16vec2) Load 54(i16v) - 64: 57(i16vec2) Bitcast 63 - Store 59(u16v) 64 + 62: 61(ivec2) UConvert 60 + 63: 49(ivec2) Bitcast 62 + Store 51(i32v) 63 + 64: 52(i16vec2) Load 54(i16v) + 65: 57(i16vec2) Bitcast 64 + Store 59(u16v) 65 68: 52(i16vec2) Load 54(i16v) 69: 49(ivec2) SConvert 68 - 70: 65(ivec2) Bitcast 69 + 70: 61(ivec2) Bitcast 69 Store 67(u32v) 70 75: 52(i16vec2) Load 54(i16v) 76: 72(i64vec2) SConvert 75 @@ -253,10 +253,10 @@ spv.int16.frag 83: 78(i64vec2) Bitcast 82 Store 80(u64v) 83 84: 57(i16vec2) Load 59(u16v) - 85: 65(ivec2) UConvert 84 + 85: 61(ivec2) UConvert 84 Store 67(u32v) 85 86: 57(i16vec2) Load 59(u16v) - 87: 72(i64vec2) UConvert 86 + 87: 78(i64vec2) UConvert 86 88: 72(i64vec2) Bitcast 87 Store 74(i64v) 88 89: 57(i16vec2) Load 59(u16v) @@ -284,7 +284,7 @@ spv.int16.frag 116: 49(ivec2) SConvert 115 Store 51(i32v) 116 117: 57(i16vec2) Load 59(u16v) - 118: 49(ivec2) UConvert 117 + 118: 61(ivec2) UConvert 117 119: 49(ivec2) Bitcast 118 Store 51(i32v) 119 120: 52(i16vec2) Load 54(i16v) @@ -292,7 +292,7 @@ spv.int16.frag Store 59(u16v) 121 122: 52(i16vec2) Load 54(i16v) 123: 49(ivec2) SConvert 122 - 124: 65(ivec2) Bitcast 123 + 124: 61(ivec2) Bitcast 123 Store 67(u32v) 124 125: 52(i16vec2) Load 54(i16v) 126: 72(i64vec2) SConvert 125 @@ -302,14 +302,14 @@ spv.int16.frag 129: 78(i64vec2) Bitcast 128 Store 80(u64v) 129 130: 57(i16vec2) Load 59(u16v) - 131: 65(ivec2) UConvert 130 + 131: 61(ivec2) UConvert 130 Store 67(u32v) 131 132: 57(i16vec2) Load 59(u16v) - 133: 72(i64vec2) UConvert 132 + 133: 78(i64vec2) UConvert 132 134: 72(i64vec2) Bitcast 133 Store 74(i64v) 134 135: 57(i16vec2) Load 59(u16v) - 136: 72(i64vec2) UConvert 135 + 136: 78(i64vec2) UConvert 135 137: 72(i64vec2) Bitcast 136 138: 78(i64vec2) Bitcast 137 Store 80(u64v) 138 @@ -335,19 +335,19 @@ spv.int16.frag 156: 152(i8vec2) SConvert 155 Store 154(i8v) 156 157: 57(i16vec2) Load 59(u16v) - 158: 152(i8vec2) UConvert 157 - 159: 152(i8vec2) Bitcast 158 - Store 154(i8v) 159 + 160: 159(i8vec2) UConvert 157 + 161: 152(i8vec2) Bitcast 160 + Store 154(i8v) 161 164: 52(i16vec2) Load 54(i16v) 165: 152(i8vec2) SConvert 164 - 166: 161(i8vec2) Bitcast 165 + 166: 159(i8vec2) Bitcast 165 Store 163(u8v) 166 167: 57(i16vec2) Load 59(u16v) - 168: 161(i8vec2) UConvert 167 + 168: 159(i8vec2) UConvert 167 Store 163(u8v) 168 169: 57(i16vec2) Load 59(u16v) - 170: 161(i8vec2) UConvert 169 - 171: 52(i16vec2) UConvert 170 + 170: 159(i8vec2) UConvert 169 + 171: 57(i16vec2) UConvert 170 172: 52(i16vec2) Bitcast 171 Store 54(i16v) 172 177: 174(bvec2) Load 176(bv) diff --git a/Test/baseResults/spv.int32.frag.out b/Test/baseResults/spv.int32.frag.out index 332c424d..d72de0de 100644 --- a/Test/baseResults/spv.int32.frag.out +++ b/Test/baseResults/spv.int32.frag.out @@ -42,8 +42,8 @@ spv.int32.frag Name 78 "f32v" Name 84 "f64v" Name 94 "i8v" - Name 103 "i16v" - Name 123 "u8v" + Name 105 "i16v" + Name 125 "u8v" Name 132 "u16v" Name 152 "f16v" Name 168 "bv" @@ -144,15 +144,15 @@ spv.int32.frag 91: TypeInt 8 1 92: TypeVector 91(int8_t) 2 93: TypePointer Function 92(i8vec2) - 100: TypeInt 16 1 - 101: TypeVector 100(int16_t) 2 - 102: TypePointer Function 101(i16vec2) - 120: TypeInt 8 0 - 121: TypeVector 120(int8_t) 2 - 122: TypePointer Function 121(i8vec2) - 129: TypeInt 16 0 - 130: TypeVector 129(int16_t) 2 - 131: TypePointer Function 130(i16vec2) + 98: TypeInt 8 0 + 99: TypeVector 98(int8_t) 2 + 102: TypeInt 16 1 + 103: TypeVector 102(int16_t) 2 + 104: TypePointer Function 103(i16vec2) + 109: TypeInt 16 0 + 110: TypeVector 109(int16_t) 2 + 124: TypePointer Function 99(i8vec2) + 131: TypePointer Function 110(i16vec2) 149: TypeFloat 16 150: TypeVector 149(float16_t) 2 151: TypePointer Function 150(f16vec2) @@ -181,7 +181,7 @@ spv.int32.frag 395: 394(bvec3) ConstantComposite 381 381 381 397: TypeVector 91(int8_t) 4 398: TypePointer Function 397(i8vec4) - 405: TypeVector 120(int8_t) 4 + 405: TypeVector 98(int8_t) 4 406: TypePointer Function 405(i8vec4) 417: TypePointer Function 63(int64_t) 421: TypePointer Function 394(bvec3) @@ -229,8 +229,8 @@ spv.int32.frag 78(f32v): 77(ptr) Variable Function 84(f64v): 83(ptr) Variable Function 94(i8v): 93(ptr) Variable Function - 103(i16v): 102(ptr) Variable Function - 123(u8v): 122(ptr) Variable Function + 105(i16v): 104(ptr) Variable Function + 125(u8v): 124(ptr) Variable Function 132(u16v): 131(ptr) Variable Function 152(f16v): 151(ptr) Variable Function 168(bv): 167(ptr) Variable Function @@ -245,7 +245,7 @@ spv.int32.frag 69: 64(i64vec2) Bitcast 68 Store 66(u64v) 69 70: 49(ivec2) Load 51(u32v) - 71: 58(i64vec2) UConvert 70 + 71: 64(i64vec2) UConvert 70 72: 58(i64vec2) Bitcast 71 Store 60(i64v) 72 73: 49(ivec2) Load 51(u32v) @@ -267,44 +267,44 @@ spv.int32.frag 96: 92(i8vec2) SConvert 95 Store 94(i8v) 96 97: 49(ivec2) Load 51(u32v) - 98: 92(i8vec2) UConvert 97 - 99: 92(i8vec2) Bitcast 98 - Store 94(i8v) 99 - 104: 52(ivec2) Load 54(i32v) - 105:101(i16vec2) SConvert 104 - Store 103(i16v) 105 - 106: 49(ivec2) Load 51(u32v) - 107:101(i16vec2) UConvert 106 - 108:101(i16vec2) Bitcast 107 - Store 103(i16v) 108 - 109: 52(ivec2) Load 54(i32v) - 110: 18(int) CompositeExtract 109 0 - 111: 18(int) CompositeExtract 109 1 - 112: 52(ivec2) CompositeConstruct 110 111 - Store 54(i32v) 112 - 113: 49(ivec2) Load 51(u32v) - 114: 52(ivec2) Bitcast 113 - Store 54(i32v) 114 - 115: 52(ivec2) Load 54(i32v) - 116: 58(i64vec2) SConvert 115 - Store 60(i64v) 116 + 100: 99(i8vec2) UConvert 97 + 101: 92(i8vec2) Bitcast 100 + Store 94(i8v) 101 + 106: 52(ivec2) Load 54(i32v) + 107:103(i16vec2) SConvert 106 + Store 105(i16v) 107 + 108: 49(ivec2) Load 51(u32v) + 111:110(i16vec2) UConvert 108 + 112:103(i16vec2) Bitcast 111 + Store 105(i16v) 112 + 113: 52(ivec2) Load 54(i32v) + 114: 18(int) CompositeExtract 113 0 + 115: 18(int) CompositeExtract 113 1 + 116: 52(ivec2) CompositeConstruct 114 115 + Store 54(i32v) 116 117: 49(ivec2) Load 51(u32v) - 118: 58(i64vec2) UConvert 117 - 119: 58(i64vec2) Bitcast 118 - Store 60(i64v) 119 - 124: 52(ivec2) Load 54(i32v) - 125: 92(i8vec2) SConvert 124 - 126: 121(i8vec2) Bitcast 125 - Store 123(u8v) 126 - 127: 49(ivec2) Load 51(u32v) - 128: 121(i8vec2) UConvert 127 - Store 123(u8v) 128 + 118: 52(ivec2) Bitcast 117 + Store 54(i32v) 118 + 119: 52(ivec2) Load 54(i32v) + 120: 58(i64vec2) SConvert 119 + Store 60(i64v) 120 + 121: 49(ivec2) Load 51(u32v) + 122: 64(i64vec2) UConvert 121 + 123: 58(i64vec2) Bitcast 122 + Store 60(i64v) 123 + 126: 52(ivec2) Load 54(i32v) + 127: 92(i8vec2) SConvert 126 + 128: 99(i8vec2) Bitcast 127 + Store 125(u8v) 128 + 129: 49(ivec2) Load 51(u32v) + 130: 99(i8vec2) UConvert 129 + Store 125(u8v) 130 133: 52(ivec2) Load 54(i32v) - 134:101(i16vec2) SConvert 133 - 135:130(i16vec2) Bitcast 134 + 134:103(i16vec2) SConvert 133 + 135:110(i16vec2) Bitcast 134 Store 132(u16v) 135 136: 49(ivec2) Load 51(u32v) - 137:130(i16vec2) UConvert 136 + 137:110(i16vec2) UConvert 136 Store 132(u16v) 137 138: 52(ivec2) Load 54(i32v) 139: 49(ivec2) Bitcast 138 @@ -519,7 +519,7 @@ spv.int32.frag 325(u32v): 185(ptr) Variable Function 327(u32): 38(ptr) Variable Function 399(i8v4): 398(ptr) Variable Function - 402(i16v2): 102(ptr) Variable Function + 402(i16v2): 104(ptr) Variable Function 407(u8v4): 406(ptr) Variable Function 410(u16v2): 131(ptr) Variable Function 413(i64): 226(ptr) Variable Function @@ -621,13 +621,13 @@ spv.int32.frag 400: 397(i8vec4) Load 399(i8v4) 401: 18(int) Bitcast 400 Store 315(i32) 401 - 403:101(i16vec2) Load 402(i16v2) + 403:103(i16vec2) Load 402(i16v2) 404: 18(int) Bitcast 403 Store 315(i32) 404 408: 405(i8vec4) Load 407(u8v4) 409: 14(int) Bitcast 408 Store 327(u32) 409 - 411:130(i16vec2) Load 410(u16v2) + 411:110(i16vec2) Load 410(u16v2) 412: 14(int) Bitcast 411 Store 327(u32) 412 414: 57(int64_t) Load 413(i64) diff --git a/Test/baseResults/spv.int64.frag.out b/Test/baseResults/spv.int64.frag.out index ef215308..b82cfa32 100644 --- a/Test/baseResults/spv.int64.frag.out +++ b/Test/baseResults/spv.int64.frag.out @@ -167,13 +167,13 @@ spv.int64.frag 477: 14(int64_t) SpecConstantOp 113 468(su) 478: 18(int64_t) SpecConstantOp 128 466(su64) 69 479: 14(int64_t) SpecConstantOp 128 465(si64) 69 - 480: 31(int) SpecConstantOp 113 466(su64) + 480: 21(int) SpecConstantOp 113 466(su64) 481: 31(int) SpecConstantOp 128 480 227 482: 18(int64_t) SpecConstantOp 114 467(si) 483: 14(int64_t) SpecConstantOp 128 482 69 484: 31(int) SpecConstantOp 114 465(si64) 485: 21(int) SpecConstantOp 128 484 227 - 486: 18(int64_t) SpecConstantOp 113 468(su) + 486: 14(int64_t) SpecConstantOp 113 468(su) 487: 18(int64_t) SpecConstantOp 128 486 69 4(main): 2 Function None 3 5: Label @@ -268,11 +268,11 @@ spv.int64.frag 122: 81(ivec2) Bitcast 121 Store 83(uv) 122 123: 81(ivec2) Load 83(uv) - 124: 52(i64vec2) UConvert 123 + 124: 65(i64vec2) UConvert 123 125: 52(i64vec2) Bitcast 124 Store 54(i64v) 125 126: 65(i64vec2) Load 67(u64v) - 127: 74(ivec2) UConvert 126 + 127: 81(ivec2) UConvert 126 128: 74(ivec2) Bitcast 127 Store 76(iv) 128 129: 74(ivec2) Load 76(iv) diff --git a/Test/baseResults/spv.int8.frag.out b/Test/baseResults/spv.int8.frag.out index 4c5b590b..20c37cc7 100644 --- a/Test/baseResults/spv.int8.frag.out +++ b/Test/baseResults/spv.int8.frag.out @@ -37,13 +37,13 @@ spv.int8.frag Name 51 "u8v" Name 54 "i8v" Name 60 "i16v" - Name 68 "i32v" - Name 76 "u32v" - Name 83 "i64v" - Name 89 "u64v" - Name 103 "f16v" - Name 109 "f32v" - Name 115 "f64v" + Name 70 "i32v" + Name 78 "u32v" + Name 85 "i64v" + Name 91 "u64v" + Name 105 "f16v" + Name 111 "f32v" + Name 117 "f64v" Name 144 "u16v" Name 174 "bv" Name 192 "u8v" @@ -125,28 +125,28 @@ spv.int8.frag 57: TypeInt 16 1 58: TypeVector 57(int16_t) 2 59: TypePointer Function 58(i16vec2) - 66: TypeVector 27(int) 2 - 67: TypePointer Function 66(ivec2) + 64: TypeInt 16 0 + 65: TypeVector 64(int16_t) 2 + 68: TypeVector 27(int) 2 + 69: TypePointer Function 68(ivec2) 74: TypeVector 17(int) 2 - 75: TypePointer Function 74(ivec2) - 80: TypeInt 64 1 - 81: TypeVector 80(int64_t) 2 - 82: TypePointer Function 81(i64vec2) - 86: TypeInt 64 0 - 87: TypeVector 86(int64_t) 2 - 88: TypePointer Function 87(i64vec2) - 100: TypeFloat 16 - 101: TypeVector 100(float16_t) 2 - 102: TypePointer Function 101(f16vec2) - 106: TypeFloat 32 - 107: TypeVector 106(float) 2 - 108: TypePointer Function 107(fvec2) - 112: TypeFloat 64 - 113: TypeVector 112(float64_t) 2 - 114: TypePointer Function 113(f64vec2) - 141: TypeInt 16 0 - 142: TypeVector 141(int16_t) 2 - 143: TypePointer Function 142(i16vec2) + 77: TypePointer Function 74(ivec2) + 82: TypeInt 64 1 + 83: TypeVector 82(int64_t) 2 + 84: TypePointer Function 83(i64vec2) + 88: TypeInt 64 0 + 89: TypeVector 88(int64_t) 2 + 90: TypePointer Function 89(i64vec2) + 102: TypeFloat 16 + 103: TypeVector 102(float16_t) 2 + 104: TypePointer Function 103(f16vec2) + 108: TypeFloat 32 + 109: TypeVector 108(float) 2 + 110: TypePointer Function 109(fvec2) + 114: TypeFloat 64 + 115: TypeVector 114(float64_t) 2 + 116: TypePointer Function 115(f64vec2) + 143: TypePointer Function 65(i16vec2) 171: TypeBool 172: TypeVector 171(bool) 2 173: TypePointer Function 172(bvec2) @@ -179,7 +179,7 @@ spv.int8.frag 428: 427(bvec3) ConstantComposite 411 411 411 434: TypeVector 14(int8_t) 4 435: TypePointer Function 434(i8vec4) - 439: TypePointer Function 141(int16_t) + 439: TypePointer Function 64(int16_t) 445: TypeVector 36(int8_t) 4 446: TypePointer Function 445(i8vec4) 458: TypePointer Function 427(bvec3) @@ -217,13 +217,13 @@ spv.int8.frag 51(u8v): 50(ptr) Variable Function 54(i8v): 53(ptr) Variable Function 60(i16v): 59(ptr) Variable Function - 68(i32v): 67(ptr) Variable Function - 76(u32v): 75(ptr) Variable Function - 83(i64v): 82(ptr) Variable Function - 89(u64v): 88(ptr) Variable Function - 103(f16v): 102(ptr) Variable Function - 109(f32v): 108(ptr) Variable Function - 115(f64v): 114(ptr) Variable Function + 70(i32v): 69(ptr) Variable Function + 78(u32v): 77(ptr) Variable Function + 85(i64v): 84(ptr) Variable Function + 91(u64v): 90(ptr) Variable Function + 105(f16v): 104(ptr) Variable Function + 111(f32v): 110(ptr) Variable Function + 117(f64v): 116(ptr) Variable Function 144(u16v): 143(ptr) Variable Function 174(bv): 173(ptr) Variable Function 55: 52(i8vec2) Load 54(i8v) @@ -233,116 +233,116 @@ spv.int8.frag 62: 58(i16vec2) SConvert 61 Store 60(i16v) 62 63: 49(i8vec2) Load 51(u8v) - 64: 58(i16vec2) UConvert 63 - 65: 58(i16vec2) Bitcast 64 - Store 60(i16v) 65 - 69: 52(i8vec2) Load 54(i8v) - 70: 66(ivec2) SConvert 69 - Store 68(i32v) 70 - 71: 49(i8vec2) Load 51(u8v) - 72: 66(ivec2) UConvert 71 - 73: 66(ivec2) Bitcast 72 - Store 68(i32v) 73 - 77: 52(i8vec2) Load 54(i8v) - 78: 66(ivec2) SConvert 77 - 79: 74(ivec2) Bitcast 78 - Store 76(u32v) 79 - 84: 52(i8vec2) Load 54(i8v) - 85: 81(i64vec2) SConvert 84 - Store 83(i64v) 85 - 90: 52(i8vec2) Load 54(i8v) - 91: 81(i64vec2) SConvert 90 - 92: 87(i64vec2) Bitcast 91 - Store 89(u64v) 92 - 93: 49(i8vec2) Load 51(u8v) - 94: 74(ivec2) UConvert 93 - Store 76(u32v) 94 + 66: 65(i16vec2) UConvert 63 + 67: 58(i16vec2) Bitcast 66 + Store 60(i16v) 67 + 71: 52(i8vec2) Load 54(i8v) + 72: 68(ivec2) SConvert 71 + Store 70(i32v) 72 + 73: 49(i8vec2) Load 51(u8v) + 75: 74(ivec2) UConvert 73 + 76: 68(ivec2) Bitcast 75 + Store 70(i32v) 76 + 79: 52(i8vec2) Load 54(i8v) + 80: 68(ivec2) SConvert 79 + 81: 74(ivec2) Bitcast 80 + Store 78(u32v) 81 + 86: 52(i8vec2) Load 54(i8v) + 87: 83(i64vec2) SConvert 86 + Store 85(i64v) 87 + 92: 52(i8vec2) Load 54(i8v) + 93: 83(i64vec2) SConvert 92 + 94: 89(i64vec2) Bitcast 93 + Store 91(u64v) 94 95: 49(i8vec2) Load 51(u8v) - 96: 81(i64vec2) UConvert 95 - 97: 81(i64vec2) Bitcast 96 - Store 83(i64v) 97 - 98: 49(i8vec2) Load 51(u8v) - 99: 87(i64vec2) UConvert 98 - Store 89(u64v) 99 - 104: 52(i8vec2) Load 54(i8v) - 105:101(f16vec2) ConvertSToF 104 - Store 103(f16v) 105 - 110: 52(i8vec2) Load 54(i8v) - 111: 107(fvec2) ConvertSToF 110 - Store 109(f32v) 111 - 116: 52(i8vec2) Load 54(i8v) - 117:113(f64vec2) ConvertSToF 116 - Store 115(f64v) 117 - 118: 49(i8vec2) Load 51(u8v) - 119:101(f16vec2) ConvertUToF 118 - Store 103(f16v) 119 + 96: 74(ivec2) UConvert 95 + Store 78(u32v) 96 + 97: 49(i8vec2) Load 51(u8v) + 98: 89(i64vec2) UConvert 97 + 99: 83(i64vec2) Bitcast 98 + Store 85(i64v) 99 + 100: 49(i8vec2) Load 51(u8v) + 101: 89(i64vec2) UConvert 100 + Store 91(u64v) 101 + 106: 52(i8vec2) Load 54(i8v) + 107:103(f16vec2) ConvertSToF 106 + Store 105(f16v) 107 + 112: 52(i8vec2) Load 54(i8v) + 113: 109(fvec2) ConvertSToF 112 + Store 111(f32v) 113 + 118: 52(i8vec2) Load 54(i8v) + 119:115(f64vec2) ConvertSToF 118 + Store 117(f64v) 119 120: 49(i8vec2) Load 51(u8v) - 121: 107(fvec2) ConvertUToF 120 - Store 109(f32v) 121 + 121:103(f16vec2) ConvertUToF 120 + Store 105(f16v) 121 122: 49(i8vec2) Load 51(u8v) - 123:113(f64vec2) ConvertUToF 122 - Store 115(f64v) 123 + 123: 109(fvec2) ConvertUToF 122 + Store 111(f32v) 123 124: 49(i8vec2) Load 51(u8v) - 125: 52(i8vec2) Bitcast 124 - Store 54(i8v) 125 - 126: 52(i8vec2) Load 54(i8v) - 127: 58(i16vec2) SConvert 126 - Store 60(i16v) 127 - 128: 49(i8vec2) Load 51(u8v) - 129: 58(i16vec2) UConvert 128 - 130: 58(i16vec2) Bitcast 129 - Store 60(i16v) 130 - 131: 52(i8vec2) Load 54(i8v) - 132: 66(ivec2) SConvert 131 - Store 68(i32v) 132 - 133: 49(i8vec2) Load 51(u8v) - 134: 66(ivec2) UConvert 133 - 135: 66(ivec2) Bitcast 134 - Store 68(i32v) 135 - 136: 52(i8vec2) Load 54(i8v) - 137: 81(i64vec2) SConvert 136 - Store 83(i64v) 137 + 125:115(f64vec2) ConvertUToF 124 + Store 117(f64v) 125 + 126: 49(i8vec2) Load 51(u8v) + 127: 52(i8vec2) Bitcast 126 + Store 54(i8v) 127 + 128: 52(i8vec2) Load 54(i8v) + 129: 58(i16vec2) SConvert 128 + Store 60(i16v) 129 + 130: 49(i8vec2) Load 51(u8v) + 131: 65(i16vec2) UConvert 130 + 132: 58(i16vec2) Bitcast 131 + Store 60(i16v) 132 + 133: 52(i8vec2) Load 54(i8v) + 134: 68(ivec2) SConvert 133 + Store 70(i32v) 134 + 135: 49(i8vec2) Load 51(u8v) + 136: 74(ivec2) UConvert 135 + 137: 68(ivec2) Bitcast 136 + Store 70(i32v) 137 138: 52(i8vec2) Load 54(i8v) - 139: 81(i64vec2) SConvert 138 - 140: 87(i64vec2) Bitcast 139 - Store 89(u64v) 140 + 139: 83(i64vec2) SConvert 138 + Store 85(i64v) 139 + 140: 52(i8vec2) Load 54(i8v) + 141: 83(i64vec2) SConvert 140 + 142: 89(i64vec2) Bitcast 141 + Store 91(u64v) 142 145: 52(i8vec2) Load 54(i8v) 146: 58(i16vec2) SConvert 145 - 147:142(i16vec2) Bitcast 146 + 147: 65(i16vec2) Bitcast 146 Store 144(u16v) 147 148: 49(i8vec2) Load 51(u8v) - 149:142(i16vec2) UConvert 148 + 149: 65(i16vec2) UConvert 148 Store 144(u16v) 149 150: 49(i8vec2) Load 51(u8v) 151: 74(ivec2) UConvert 150 - Store 76(u32v) 151 + Store 78(u32v) 151 152: 49(i8vec2) Load 51(u8v) - 153: 81(i64vec2) UConvert 152 - 154: 81(i64vec2) Bitcast 153 - Store 83(i64v) 154 + 153: 89(i64vec2) UConvert 152 + 154: 83(i64vec2) Bitcast 153 + Store 85(i64v) 154 155: 49(i8vec2) Load 51(u8v) - 156: 81(i64vec2) UConvert 155 - 157: 81(i64vec2) Bitcast 156 - 158: 87(i64vec2) Bitcast 157 - Store 89(u64v) 158 + 156: 89(i64vec2) UConvert 155 + 157: 83(i64vec2) Bitcast 156 + 158: 89(i64vec2) Bitcast 157 + Store 91(u64v) 158 159: 52(i8vec2) Load 54(i8v) - 160:101(f16vec2) ConvertSToF 159 - Store 103(f16v) 160 + 160:103(f16vec2) ConvertSToF 159 + Store 105(f16v) 160 161: 52(i8vec2) Load 54(i8v) - 162: 107(fvec2) ConvertSToF 161 - Store 109(f32v) 162 + 162: 109(fvec2) ConvertSToF 161 + Store 111(f32v) 162 163: 52(i8vec2) Load 54(i8v) - 164:113(f64vec2) ConvertSToF 163 - Store 115(f64v) 164 + 164:115(f64vec2) ConvertSToF 163 + Store 117(f64v) 164 165: 49(i8vec2) Load 51(u8v) - 166:101(f16vec2) ConvertUToF 165 - Store 103(f16v) 166 + 166:103(f16vec2) ConvertUToF 165 + Store 105(f16v) 166 167: 49(i8vec2) Load 51(u8v) - 168: 107(fvec2) ConvertUToF 167 - Store 109(f32v) 168 + 168: 109(fvec2) ConvertUToF 167 + Store 111(f32v) 168 169: 49(i8vec2) Load 51(u8v) - 170:113(f64vec2) ConvertUToF 169 - Store 115(f64v) 170 + 170:115(f64vec2) ConvertUToF 169 + Store 117(f64v) 170 175: 172(bvec2) Load 174(bv) 179: 52(i8vec2) Select 175 178 177 Store 54(i8v) 179 @@ -649,7 +649,7 @@ spv.int8.frag 438: 27(int) Bitcast 437 Store 433(i32) 438 442: 49(i8vec2) Load 441(u8v2) - 443:141(int16_t) Bitcast 442 + 443: 64(int16_t) Bitcast 442 Store 440(u16) 443 448: 445(i8vec4) Load 447(u8v4) 449: 17(int) Bitcast 448 @@ -660,7 +660,7 @@ spv.int8.frag 452: 27(int) Load 433(i32) 453: 434(i8vec4) Bitcast 452 Store 436(i8v4) 453 - 454:141(int16_t) Load 440(u16) + 454: 64(int16_t) Load 440(u16) 455: 49(i8vec2) Bitcast 454 Store 441(u8v2) 455 456: 17(int) Load 444(u32) diff --git a/Test/baseResults/spv.vulkan110.int16.frag.out b/Test/baseResults/spv.vulkan110.int16.frag.out index 5c28b4e9..b6936f8c 100755 --- a/Test/baseResults/spv.vulkan110.int16.frag.out +++ b/Test/baseResults/spv.vulkan110.int16.frag.out @@ -125,8 +125,8 @@ spv.vulkan110.int16.frag 53: TypePointer Function 52(i16vec2) 57: TypeVector 36(int16_t) 2 58: TypePointer Function 57(i16vec2) - 65: TypeVector 17(int) 2 - 66: TypePointer Function 65(ivec2) + 61: TypeVector 17(int) 2 + 66: TypePointer Function 61(ivec2) 71: TypeInt 64 1 72: TypeVector 71(int64_t) 2 73: TypePointer Function 72(i64vec2) @@ -145,9 +145,9 @@ spv.vulkan110.int16.frag 151: TypeInt 8 1 152: TypeVector 151(int8_t) 2 153: TypePointer Function 152(i8vec2) - 160: TypeInt 8 0 - 161: TypeVector 160(int8_t) 2 - 162: TypePointer Function 161(i8vec2) + 158: TypeInt 8 0 + 159: TypeVector 158(int8_t) 2 + 162: TypePointer Function 159(i8vec2) 173: TypeBool 174: TypeVector 173(bool) 2 175: TypePointer Function 174(bvec2) @@ -232,15 +232,15 @@ spv.vulkan110.int16.frag 56: 49(ivec2) SConvert 55 Store 51(i32v) 56 60: 57(i16vec2) Load 59(u16v) - 61: 49(ivec2) UConvert 60 - 62: 49(ivec2) Bitcast 61 - Store 51(i32v) 62 - 63: 52(i16vec2) Load 54(i16v) - 64: 57(i16vec2) Bitcast 63 - Store 59(u16v) 64 + 62: 61(ivec2) UConvert 60 + 63: 49(ivec2) Bitcast 62 + Store 51(i32v) 63 + 64: 52(i16vec2) Load 54(i16v) + 65: 57(i16vec2) Bitcast 64 + Store 59(u16v) 65 68: 52(i16vec2) Load 54(i16v) 69: 49(ivec2) SConvert 68 - 70: 65(ivec2) Bitcast 69 + 70: 61(ivec2) Bitcast 69 Store 67(u32v) 70 75: 52(i16vec2) Load 54(i16v) 76: 72(i64vec2) SConvert 75 @@ -250,10 +250,10 @@ spv.vulkan110.int16.frag 83: 78(i64vec2) Bitcast 82 Store 80(u64v) 83 84: 57(i16vec2) Load 59(u16v) - 85: 65(ivec2) UConvert 84 + 85: 61(ivec2) UConvert 84 Store 67(u32v) 85 86: 57(i16vec2) Load 59(u16v) - 87: 72(i64vec2) UConvert 86 + 87: 78(i64vec2) UConvert 86 88: 72(i64vec2) Bitcast 87 Store 74(i64v) 88 89: 57(i16vec2) Load 59(u16v) @@ -281,7 +281,7 @@ spv.vulkan110.int16.frag 116: 49(ivec2) SConvert 115 Store 51(i32v) 116 117: 57(i16vec2) Load 59(u16v) - 118: 49(ivec2) UConvert 117 + 118: 61(ivec2) UConvert 117 119: 49(ivec2) Bitcast 118 Store 51(i32v) 119 120: 52(i16vec2) Load 54(i16v) @@ -289,7 +289,7 @@ spv.vulkan110.int16.frag Store 59(u16v) 121 122: 52(i16vec2) Load 54(i16v) 123: 49(ivec2) SConvert 122 - 124: 65(ivec2) Bitcast 123 + 124: 61(ivec2) Bitcast 123 Store 67(u32v) 124 125: 52(i16vec2) Load 54(i16v) 126: 72(i64vec2) SConvert 125 @@ -299,14 +299,14 @@ spv.vulkan110.int16.frag 129: 78(i64vec2) Bitcast 128 Store 80(u64v) 129 130: 57(i16vec2) Load 59(u16v) - 131: 65(ivec2) UConvert 130 + 131: 61(ivec2) UConvert 130 Store 67(u32v) 131 132: 57(i16vec2) Load 59(u16v) - 133: 72(i64vec2) UConvert 132 + 133: 78(i64vec2) UConvert 132 134: 72(i64vec2) Bitcast 133 Store 74(i64v) 134 135: 57(i16vec2) Load 59(u16v) - 136: 72(i64vec2) UConvert 135 + 136: 78(i64vec2) UConvert 135 137: 72(i64vec2) Bitcast 136 138: 78(i64vec2) Bitcast 137 Store 80(u64v) 138 @@ -332,19 +332,19 @@ spv.vulkan110.int16.frag 156: 152(i8vec2) SConvert 155 Store 154(i8v) 156 157: 57(i16vec2) Load 59(u16v) - 158: 152(i8vec2) UConvert 157 - 159: 152(i8vec2) Bitcast 158 - Store 154(i8v) 159 + 160: 159(i8vec2) UConvert 157 + 161: 152(i8vec2) Bitcast 160 + Store 154(i8v) 161 164: 52(i16vec2) Load 54(i16v) 165: 152(i8vec2) SConvert 164 - 166: 161(i8vec2) Bitcast 165 + 166: 159(i8vec2) Bitcast 165 Store 163(u8v) 166 167: 57(i16vec2) Load 59(u16v) - 168: 161(i8vec2) UConvert 167 + 168: 159(i8vec2) UConvert 167 Store 163(u8v) 168 169: 57(i16vec2) Load 59(u16v) - 170: 161(i8vec2) UConvert 169 - 171: 52(i16vec2) UConvert 170 + 170: 159(i8vec2) UConvert 169 + 171: 57(i16vec2) UConvert 170 172: 52(i16vec2) Bitcast 171 Store 54(i16v) 172 177: 174(bvec2) Load 176(bv)