Add bit width of types to disassembleInstruction
This commit is contained in:
Jeff Bolz
@@ -72,17 +72,17 @@ spv.int64.frag
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2: TypeVoid
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3: TypeFunction 2
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14: TypeInt 64 0
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15: TypePointer Private 14(int)
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15: TypePointer Private 14(int64_t)
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16(u64Max): 15(ptr) Variable Private
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17: 14(int) Constant 4294967295 4294967295
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17: 14(int64_t) Constant 4294967295 4294967295
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18: TypeInt 64 1
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19: TypePointer Function 18(int)
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19: TypePointer Function 18(int64_t)
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21: TypeInt 32 0
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22: 21(int) Constant 3
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23: TypeArray 18(int) 22
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24: 18(int) Constant 4008636143 4008636142
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25: 18(int) Constant 4294967295 4294967295
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26: 18(int) Constant 0 1
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23: TypeArray 18(int64_t) 22
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24: 18(int64_t) Constant 4008636143 4008636142
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25: 18(int64_t) Constant 4294967295 4294967295
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26: 18(int64_t) Constant 0 1
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27: 23 ConstantComposite 24 25 26
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28(Uniforms): TypeStruct 21(int)
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29: TypePointer Uniform 28(Uniforms)
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@@ -91,27 +91,27 @@ spv.int64.frag
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32: 31(int) Constant 0
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33: TypePointer Uniform 21(int)
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36: TypePointer Function 23
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40: TypePointer Function 14(int)
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42: TypeArray 14(int) 22
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43: 14(int) Constant 0 1
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44: 14(int) Constant 4294967295 1
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40: TypePointer Function 14(int64_t)
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42: TypeArray 14(int64_t) 22
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43: 14(int64_t) Constant 0 1
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44: 14(int64_t) Constant 4294967295 1
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45: 42 ConstantComposite 17 43 44
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48: TypePointer Function 42
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52: TypeVector 18(int) 2
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53: TypePointer Function 52(ivec2)
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52: TypeVector 18(int64_t) 2
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53: TypePointer Function 52(i64vec2)
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55: TypeBool
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56: TypeVector 55(bool) 2
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57: TypePointer Function 56(bvec2)
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60: 18(int) Constant 0 0
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61: 18(int) Constant 1 0
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62: 52(ivec2) ConstantComposite 60 60
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63: 52(ivec2) ConstantComposite 61 61
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65: TypeVector 14(int) 2
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66: TypePointer Function 65(ivec2)
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69: 14(int) Constant 0 0
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70: 14(int) Constant 1 0
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71: 65(ivec2) ConstantComposite 69 69
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72: 65(ivec2) ConstantComposite 70 70
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60: 18(int64_t) Constant 0 0
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61: 18(int64_t) Constant 1 0
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62: 52(i64vec2) ConstantComposite 60 60
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63: 52(i64vec2) ConstantComposite 61 61
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65: TypeVector 14(int64_t) 2
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66: TypePointer Function 65(i64vec2)
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69: 14(int64_t) Constant 0 0
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70: 14(int64_t) Constant 1 0
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71: 65(i64vec2) ConstantComposite 69 69
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72: 65(i64vec2) ConstantComposite 70 70
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74: TypeVector 31(int) 2
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75: TypePointer Function 74(ivec2)
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81: TypeVector 21(int) 2
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@@ -120,11 +120,11 @@ spv.int64.frag
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89: TypeVector 88(float) 2
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90: TypePointer Function 89(fvec2)
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94: TypeFloat 64
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95: TypeVector 94(float) 2
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96: TypePointer Function 95(fvec2)
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132: TypeVector 14(int) 3
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133: TypePointer Function 132(ivec3)
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136: TypeVector 18(int) 3
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95: TypeVector 94(float64_t) 2
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96: TypePointer Function 95(f64vec2)
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132: TypeVector 14(int64_t) 3
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133: TypePointer Function 132(i64vec3)
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136: TypeVector 18(int64_t) 3
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158: TypePointer Function 31(int)
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164: TypeVector 21(int) 3
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165: TypePointer Function 164(ivec3)
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@@ -134,47 +134,47 @@ spv.int64.frag
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217: 21(int) Constant 2
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225: TypePointer Function 55(bool)
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227: 21(int) Constant 0
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297: 52(ivec2) ConstantComposite 25 25
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306: 132(ivec3) ConstantComposite 69 69 69
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297: 52(i64vec2) ConstantComposite 25 25
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306:132(i64vec3) ConstantComposite 69 69 69
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348: 55(bool) ConstantTrue
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355: 55(bool) ConstantFalse
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356: 56(bvec2) ConstantComposite 355 355
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368: TypeVector 55(bool) 3
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369: 368(bvec3) ConstantComposite 355 355 355
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371: TypeVector 94(float) 3
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372: TypePointer Function 371(fvec3)
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377: TypePointer Function 94(float)
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371: TypeVector 94(float64_t) 3
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372: TypePointer Function 371(f64vec3)
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377: TypePointer Function 94(float64_t)
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388: 31(int) Constant 1
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389: 31(int) Constant 2
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390: 74(ivec2) ConstantComposite 388 389
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395: 81(ivec2) ConstantComposite 217 22
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400: TypePointer Function 368(bvec3)
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462(Block): TypeStruct 136(ivec3) 14(int)
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462(Block): TypeStruct 136(i64vec3) 14(int64_t)
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463: TypePointer Uniform 462(Block)
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464(block): 463(ptr) Variable Uniform
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465(si64): 18(int) SpecConstant 4294967286 4294967295
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466(su64): 14(int) SpecConstant 20 0
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465(si64): 18(int64_t) SpecConstant 4294967286 4294967295
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466(su64): 14(int64_t) SpecConstant 20 0
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467(si): 31(int) SpecConstant 4294967291
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468(su): 21(int) SpecConstant 4
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469(sb): 55(bool) SpecConstantTrue
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470: 55(bool) SpecConstantOp 171 465(si64) 69
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471: 55(bool) SpecConstantOp 171 466(su64) 69
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472: 18(int) SpecConstantOp 169 469(sb) 61 60
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473: 14(int) SpecConstantOp 169 469(sb) 70 69
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472: 18(int64_t) SpecConstantOp 169 469(sb) 61 60
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473: 14(int64_t) SpecConstantOp 169 469(sb) 70 69
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474: 31(int) SpecConstantOp 114 465(si64)
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475: 18(int) SpecConstantOp 114 467(si)
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475: 18(int64_t) SpecConstantOp 114 467(si)
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476: 21(int) SpecConstantOp 113 466(su64)
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477: 14(int) SpecConstantOp 113 468(su)
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478: 18(int) SpecConstantOp 128 466(su64) 69
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479: 14(int) SpecConstantOp 128 465(si64) 69
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477: 14(int64_t) SpecConstantOp 113 468(su)
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478: 18(int64_t) SpecConstantOp 128 466(su64) 69
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479: 14(int64_t) SpecConstantOp 128 465(si64) 69
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480: 31(int) SpecConstantOp 113 466(su64)
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481: 31(int) SpecConstantOp 128 480 227
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482: 18(int) SpecConstantOp 114 467(si)
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483: 14(int) SpecConstantOp 128 482 69
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482: 18(int64_t) SpecConstantOp 114 467(si)
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483: 14(int64_t) SpecConstantOp 128 482 69
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484: 31(int) SpecConstantOp 114 465(si64)
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485: 21(int) SpecConstantOp 128 484 227
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486: 18(int) SpecConstantOp 113 468(su)
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487: 18(int) SpecConstantOp 128 486 69
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486: 18(int64_t) SpecConstantOp 113 468(su)
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487: 18(int64_t) SpecConstantOp 128 486 69
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4(main): 2 Function None 3
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5: Label
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Store 16(u64Max) 17
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@@ -190,13 +190,13 @@ spv.int64.frag
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35: 21(int) Load 34
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Store 37(indexable) 27
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38: 19(ptr) AccessChain 37(indexable) 35
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39: 18(int) Load 38
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39: 18(int64_t) Load 38
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Store 20(i64) 39
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46: 33(ptr) AccessChain 30 32
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47: 21(int) Load 46
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Store 49(indexable) 45
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50: 40(ptr) AccessChain 49(indexable) 47
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51: 14(int) Load 50
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51: 14(int64_t) Load 50
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Store 41(u64) 51
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Return
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FunctionEnd
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@@ -210,74 +210,74 @@ spv.int64.frag
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91(fv): 90(ptr) Variable Function
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97(dv): 96(ptr) Variable Function
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59: 56(bvec2) Load 58(bv)
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64: 52(ivec2) Select 59 63 62
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64: 52(i64vec2) Select 59 63 62
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Store 54(i64v) 64
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68: 56(bvec2) Load 58(bv)
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73: 65(ivec2) Select 68 72 71
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73: 65(i64vec2) Select 68 72 71
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Store 67(u64v) 73
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77: 74(ivec2) Load 76(iv)
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78: 52(ivec2) SConvert 77
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78: 52(i64vec2) SConvert 77
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Store 54(i64v) 78
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79: 52(ivec2) Load 54(i64v)
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79: 52(i64vec2) Load 54(i64v)
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80: 74(ivec2) SConvert 79
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Store 76(iv) 80
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84: 81(ivec2) Load 83(uv)
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85: 65(ivec2) UConvert 84
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85: 65(i64vec2) UConvert 84
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Store 67(u64v) 85
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86: 65(ivec2) Load 67(u64v)
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86: 65(i64vec2) Load 67(u64v)
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87: 81(ivec2) UConvert 86
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Store 83(uv) 87
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92: 52(ivec2) Load 54(i64v)
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92: 52(i64vec2) Load 54(i64v)
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93: 89(fvec2) ConvertSToF 92
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Store 91(fv) 93
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98: 52(ivec2) Load 54(i64v)
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99: 95(fvec2) ConvertSToF 98
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98: 52(i64vec2) Load 54(i64v)
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99: 95(f64vec2) ConvertSToF 98
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Store 97(dv) 99
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100: 65(ivec2) Load 67(u64v)
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100: 65(i64vec2) Load 67(u64v)
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101: 89(fvec2) ConvertUToF 100
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Store 91(fv) 101
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102: 65(ivec2) Load 67(u64v)
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103: 95(fvec2) ConvertUToF 102
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102: 65(i64vec2) Load 67(u64v)
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103: 95(f64vec2) ConvertUToF 102
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Store 97(dv) 103
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104: 89(fvec2) Load 91(fv)
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105: 52(ivec2) ConvertFToS 104
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105: 52(i64vec2) ConvertFToS 104
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Store 54(i64v) 105
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106: 95(fvec2) Load 97(dv)
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107: 52(ivec2) ConvertFToS 106
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106: 95(f64vec2) Load 97(dv)
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107: 52(i64vec2) ConvertFToS 106
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Store 54(i64v) 107
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108: 89(fvec2) Load 91(fv)
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109: 65(ivec2) ConvertFToU 108
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109: 65(i64vec2) ConvertFToU 108
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Store 67(u64v) 109
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110: 95(fvec2) Load 97(dv)
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111: 65(ivec2) ConvertFToU 110
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110: 95(f64vec2) Load 97(dv)
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111: 65(i64vec2) ConvertFToU 110
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Store 67(u64v) 111
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112: 52(ivec2) Load 54(i64v)
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112: 52(i64vec2) Load 54(i64v)
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113: 56(bvec2) INotEqual 112 71
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Store 58(bv) 113
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114: 65(ivec2) Load 67(u64v)
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114: 65(i64vec2) Load 67(u64v)
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115: 56(bvec2) INotEqual 114 71
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Store 58(bv) 115
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116: 52(ivec2) Load 54(i64v)
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117: 65(ivec2) Bitcast 116
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116: 52(i64vec2) Load 54(i64v)
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117: 65(i64vec2) Bitcast 116
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Store 67(u64v) 117
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118: 65(ivec2) Load 67(u64v)
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119: 52(ivec2) Bitcast 118
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118: 65(i64vec2) Load 67(u64v)
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119: 52(i64vec2) Bitcast 118
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Store 54(i64v) 119
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120: 52(ivec2) Load 54(i64v)
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120: 52(i64vec2) Load 54(i64v)
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121: 74(ivec2) SConvert 120
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122: 81(ivec2) Bitcast 121
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Store 83(uv) 122
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123: 81(ivec2) Load 83(uv)
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124: 52(ivec2) UConvert 123
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125: 52(ivec2) Bitcast 124
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124: 52(i64vec2) UConvert 123
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125: 52(i64vec2) Bitcast 124
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Store 54(i64v) 125
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126: 65(ivec2) Load 67(u64v)
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126: 65(i64vec2) Load 67(u64v)
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127: 74(ivec2) UConvert 126
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128: 74(ivec2) Bitcast 127
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Store 76(iv) 128
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129: 74(ivec2) Load 76(iv)
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130: 52(ivec2) SConvert 129
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131: 65(ivec2) Bitcast 130
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130: 52(i64vec2) SConvert 129
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131: 65(i64vec2) Bitcast 130
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Store 67(u64v) 131
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Return
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FunctionEnd
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@@ -288,177 +288,177 @@ spv.int64.frag
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159(i): 158(ptr) Variable Function
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166(uv): 165(ptr) Variable Function
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226(b): 225(ptr) Variable Function
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135: 132(ivec3) Load 134(u64v)
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137: 136(ivec3) CompositeConstruct 61 61 61
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138: 132(ivec3) IAdd 135 137
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135:132(i64vec3) Load 134(u64v)
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137:136(i64vec3) CompositeConstruct 61 61 61
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138:132(i64vec3) IAdd 135 137
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Store 134(u64v) 138
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140: 18(int) Load 139(i64)
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141: 18(int) ISub 140 61
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140: 18(int64_t) Load 139(i64)
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141: 18(int64_t) ISub 140 61
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Store 139(i64) 141
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142: 18(int) Load 139(i64)
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143: 18(int) IAdd 142 61
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142: 18(int64_t) Load 139(i64)
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143: 18(int64_t) IAdd 142 61
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Store 139(i64) 143
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144: 132(ivec3) Load 134(u64v)
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145: 136(ivec3) CompositeConstruct 61 61 61
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146: 132(ivec3) ISub 144 145
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144:132(i64vec3) Load 134(u64v)
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145:136(i64vec3) CompositeConstruct 61 61 61
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146:132(i64vec3) ISub 144 145
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Store 134(u64v) 146
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147: 132(ivec3) Load 134(u64v)
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148: 132(ivec3) Not 147
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147:132(i64vec3) Load 134(u64v)
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148:132(i64vec3) Not 147
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Store 134(u64v) 148
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149: 18(int) Load 139(i64)
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149: 18(int64_t) Load 139(i64)
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Store 139(i64) 149
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150: 132(ivec3) Load 134(u64v)
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151: 132(ivec3) SNegate 150
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150:132(i64vec3) Load 134(u64v)
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151:132(i64vec3) SNegate 150
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Store 134(u64v) 151
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152: 18(int) Load 139(i64)
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153: 18(int) Load 139(i64)
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154: 18(int) IAdd 153 152
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152: 18(int64_t) Load 139(i64)
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153: 18(int64_t) Load 139(i64)
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154: 18(int64_t) IAdd 153 152
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Store 139(i64) 154
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155: 132(ivec3) Load 134(u64v)
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156: 132(ivec3) Load 134(u64v)
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157: 132(ivec3) ISub 156 155
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155:132(i64vec3) Load 134(u64v)
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156:132(i64vec3) Load 134(u64v)
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157:132(i64vec3) ISub 156 155
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Store 134(u64v) 157
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160: 31(int) Load 159(i)
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161: 18(int) SConvert 160
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162: 18(int) Load 139(i64)
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163: 18(int) IMul 162 161
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161: 18(int64_t) SConvert 160
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162: 18(int64_t) Load 139(i64)
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163: 18(int64_t) IMul 162 161
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Store 139(i64) 163
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167: 164(ivec3) Load 166(uv)
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168: 132(ivec3) UConvert 167
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169: 132(ivec3) Load 134(u64v)
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170: 132(ivec3) UDiv 169 168
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168:132(i64vec3) UConvert 167
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169:132(i64vec3) Load 134(u64v)
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170:132(i64vec3) UDiv 169 168
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Store 134(u64v) 170
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171: 31(int) Load 159(i)
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172: 18(int) SConvert 171
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173: 14(int) Bitcast 172
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174: 132(ivec3) Load 134(u64v)
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175: 132(ivec3) CompositeConstruct 173 173 173
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176: 132(ivec3) UMod 174 175
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172: 18(int64_t) SConvert 171
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173: 14(int64_t) Bitcast 172
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174:132(i64vec3) Load 134(u64v)
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175:132(i64vec3) CompositeConstruct 173 173 173
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176:132(i64vec3) UMod 174 175
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Store 134(u64v) 176
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177: 132(ivec3) Load 134(u64v)
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177:132(i64vec3) Load 134(u64v)
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178: 164(ivec3) Load 166(uv)
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179: 132(ivec3) UConvert 178
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180: 132(ivec3) IAdd 177 179
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179:132(i64vec3) UConvert 178
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180:132(i64vec3) IAdd 177 179
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Store 134(u64v) 180
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181: 18(int) Load 139(i64)
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181: 18(int64_t) Load 139(i64)
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182: 31(int) Load 159(i)
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183: 18(int) SConvert 182
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184: 18(int) ISub 181 183
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183: 18(int64_t) SConvert 182
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184: 18(int64_t) ISub 181 183
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Store 139(i64) 184
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185: 132(ivec3) Load 134(u64v)
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185:132(i64vec3) Load 134(u64v)
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186: 164(ivec3) Load 166(uv)
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187: 132(ivec3) UConvert 186
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188: 132(ivec3) IMul 185 187
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187:132(i64vec3) UConvert 186
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188:132(i64vec3) IMul 185 187
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Store 134(u64v) 188
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189: 18(int) Load 139(i64)
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189: 18(int64_t) Load 139(i64)
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190: 31(int) Load 159(i)
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191: 18(int) SConvert 190
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192: 18(int) IMul 189 191
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191: 18(int64_t) SConvert 190
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192: 18(int64_t) IMul 189 191
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Store 139(i64) 192
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193: 18(int) Load 139(i64)
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193: 18(int64_t) Load 139(i64)
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194: 31(int) Load 159(i)
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||||
195: 18(int) SConvert 194
|
||||
196: 18(int) SMod 193 195
|
||||
195: 18(int64_t) SConvert 194
|
||||
196: 18(int64_t) SMod 193 195
|
||||
Store 139(i64) 196
|
||||
197: 132(ivec3) Load 134(u64v)
|
||||
197:132(i64vec3) Load 134(u64v)
|
||||
198: 31(int) Load 159(i)
|
||||
200: 199(ivec3) CompositeConstruct 198 198 198
|
||||
201: 132(ivec3) ShiftLeftLogical 197 200
|
||||
201:132(i64vec3) ShiftLeftLogical 197 200
|
||||
Store 134(u64v) 201
|
||||
202: 18(int) Load 139(i64)
|
||||
202: 18(int64_t) Load 139(i64)
|
||||
205: 204(ptr) AccessChain 166(uv) 203
|
||||
206: 21(int) Load 205
|
||||
207: 18(int) ShiftRightArithmetic 202 206
|
||||
207: 18(int64_t) ShiftRightArithmetic 202 206
|
||||
Store 139(i64) 207
|
||||
208: 31(int) Load 159(i)
|
||||
209: 132(ivec3) Load 134(u64v)
|
||||
209:132(i64vec3) Load 134(u64v)
|
||||
210: 199(ivec3) CompositeConstruct 208 208 208
|
||||
211: 132(ivec3) ShiftLeftLogical 209 210
|
||||
211:132(i64vec3) ShiftLeftLogical 209 210
|
||||
Store 134(u64v) 211
|
||||
212: 204(ptr) AccessChain 166(uv) 203
|
||||
213: 21(int) Load 212
|
||||
214: 18(int) Load 139(i64)
|
||||
215: 18(int) ShiftRightArithmetic 214 213
|
||||
214: 18(int64_t) Load 139(i64)
|
||||
215: 18(int64_t) ShiftRightArithmetic 214 213
|
||||
Store 139(i64) 215
|
||||
216: 18(int) Load 139(i64)
|
||||
216: 18(int64_t) Load 139(i64)
|
||||
218: 40(ptr) AccessChain 134(u64v) 217
|
||||
219: 14(int) Load 218
|
||||
220: 18(int) ShiftLeftLogical 216 219
|
||||
219: 14(int64_t) Load 218
|
||||
220: 18(int64_t) ShiftLeftLogical 216 219
|
||||
Store 139(i64) 220
|
||||
221: 132(ivec3) Load 134(u64v)
|
||||
222: 18(int) Load 139(i64)
|
||||
223: 136(ivec3) CompositeConstruct 222 222 222
|
||||
224: 132(ivec3) ShiftLeftLogical 221 223
|
||||
221:132(i64vec3) Load 134(u64v)
|
||||
222: 18(int64_t) Load 139(i64)
|
||||
223:136(i64vec3) CompositeConstruct 222 222 222
|
||||
224:132(i64vec3) ShiftLeftLogical 221 223
|
||||
Store 134(u64v) 224
|
||||
228: 40(ptr) AccessChain 134(u64v) 227
|
||||
229: 14(int) Load 228
|
||||
230: 18(int) Load 139(i64)
|
||||
231: 14(int) Bitcast 230
|
||||
229: 14(int64_t) Load 228
|
||||
230: 18(int64_t) Load 139(i64)
|
||||
231: 14(int64_t) Bitcast 230
|
||||
232: 55(bool) INotEqual 229 231
|
||||
Store 226(b) 232
|
||||
233: 18(int) Load 139(i64)
|
||||
234: 14(int) Bitcast 233
|
||||
233: 18(int64_t) Load 139(i64)
|
||||
234: 14(int64_t) Bitcast 233
|
||||
235: 40(ptr) AccessChain 134(u64v) 227
|
||||
236: 14(int) Load 235
|
||||
236: 14(int64_t) Load 235
|
||||
237: 55(bool) IEqual 234 236
|
||||
Store 226(b) 237
|
||||
238: 40(ptr) AccessChain 134(u64v) 227
|
||||
239: 14(int) Load 238
|
||||
239: 14(int64_t) Load 238
|
||||
240: 204(ptr) AccessChain 166(uv) 203
|
||||
241: 21(int) Load 240
|
||||
242: 14(int) UConvert 241
|
||||
242: 14(int64_t) UConvert 241
|
||||
243: 55(bool) UGreaterThan 239 242
|
||||
Store 226(b) 243
|
||||
244: 18(int) Load 139(i64)
|
||||
244: 18(int64_t) Load 139(i64)
|
||||
245: 31(int) Load 159(i)
|
||||
246: 18(int) SConvert 245
|
||||
246: 18(int64_t) SConvert 245
|
||||
247: 55(bool) SLessThan 244 246
|
||||
Store 226(b) 247
|
||||
248: 40(ptr) AccessChain 134(u64v) 203
|
||||
249: 14(int) Load 248
|
||||
249: 14(int64_t) Load 248
|
||||
250: 204(ptr) AccessChain 166(uv) 227
|
||||
251: 21(int) Load 250
|
||||
252: 14(int) UConvert 251
|
||||
252: 14(int64_t) UConvert 251
|
||||
253: 55(bool) UGreaterThanEqual 249 252
|
||||
Store 226(b) 253
|
||||
254: 18(int) Load 139(i64)
|
||||
254: 18(int64_t) Load 139(i64)
|
||||
255: 31(int) Load 159(i)
|
||||
256: 18(int) SConvert 255
|
||||
256: 18(int64_t) SConvert 255
|
||||
257: 55(bool) SLessThanEqual 254 256
|
||||
Store 226(b) 257
|
||||
258: 31(int) Load 159(i)
|
||||
259: 18(int) SConvert 258
|
||||
260: 14(int) Bitcast 259
|
||||
261: 132(ivec3) Load 134(u64v)
|
||||
262: 132(ivec3) CompositeConstruct 260 260 260
|
||||
263: 132(ivec3) BitwiseOr 261 262
|
||||
259: 18(int64_t) SConvert 258
|
||||
260: 14(int64_t) Bitcast 259
|
||||
261:132(i64vec3) Load 134(u64v)
|
||||
262:132(i64vec3) CompositeConstruct 260 260 260
|
||||
263:132(i64vec3) BitwiseOr 261 262
|
||||
Store 134(u64v) 263
|
||||
264: 18(int) Load 139(i64)
|
||||
264: 18(int64_t) Load 139(i64)
|
||||
265: 31(int) Load 159(i)
|
||||
266: 18(int) SConvert 265
|
||||
267: 18(int) BitwiseOr 264 266
|
||||
266: 18(int64_t) SConvert 265
|
||||
267: 18(int64_t) BitwiseOr 264 266
|
||||
Store 139(i64) 267
|
||||
268: 31(int) Load 159(i)
|
||||
269: 18(int) SConvert 268
|
||||
270: 18(int) Load 139(i64)
|
||||
271: 18(int) BitwiseAnd 270 269
|
||||
269: 18(int64_t) SConvert 268
|
||||
270: 18(int64_t) Load 139(i64)
|
||||
271: 18(int64_t) BitwiseAnd 270 269
|
||||
Store 139(i64) 271
|
||||
272: 132(ivec3) Load 134(u64v)
|
||||
272:132(i64vec3) Load 134(u64v)
|
||||
273: 164(ivec3) Load 166(uv)
|
||||
274: 132(ivec3) UConvert 273
|
||||
275: 132(ivec3) BitwiseAnd 272 274
|
||||
274:132(i64vec3) UConvert 273
|
||||
275:132(i64vec3) BitwiseAnd 272 274
|
||||
Store 134(u64v) 275
|
||||
276: 18(int) Load 139(i64)
|
||||
277: 14(int) Bitcast 276
|
||||
278: 132(ivec3) Load 134(u64v)
|
||||
279: 132(ivec3) CompositeConstruct 277 277 277
|
||||
280: 132(ivec3) BitwiseXor 278 279
|
||||
276: 18(int64_t) Load 139(i64)
|
||||
277: 14(int64_t) Bitcast 276
|
||||
278:132(i64vec3) Load 134(u64v)
|
||||
279:132(i64vec3) CompositeConstruct 277 277 277
|
||||
280:132(i64vec3) BitwiseXor 278 279
|
||||
Store 134(u64v) 280
|
||||
281: 132(ivec3) Load 134(u64v)
|
||||
282: 18(int) Load 139(i64)
|
||||
283: 14(int) Bitcast 282
|
||||
284: 132(ivec3) CompositeConstruct 283 283 283
|
||||
285: 132(ivec3) BitwiseXor 281 284
|
||||
281:132(i64vec3) Load 134(u64v)
|
||||
282: 18(int64_t) Load 139(i64)
|
||||
283: 14(int64_t) Bitcast 282
|
||||
284:132(i64vec3) CompositeConstruct 283 283 283
|
||||
285:132(i64vec3) BitwiseXor 281 284
|
||||
Store 134(u64v) 285
|
||||
Return
|
||||
FunctionEnd
|
||||
@@ -472,193 +472,193 @@ spv.int64.frag
|
||||
392(iv): 75(ptr) Variable Function
|
||||
397(uv): 82(ptr) Variable Function
|
||||
401(bv): 400(ptr) Variable Function
|
||||
287: 52(ivec2) Load 286(i64v)
|
||||
288: 52(ivec2) ExtInst 1(GLSL.std.450) 5(SAbs) 287
|
||||
287: 52(i64vec2) Load 286(i64v)
|
||||
288: 52(i64vec2) ExtInst 1(GLSL.std.450) 5(SAbs) 287
|
||||
Store 286(i64v) 288
|
||||
290: 18(int) Load 289(i64)
|
||||
291: 18(int) ExtInst 1(GLSL.std.450) 7(SSign) 290
|
||||
290: 18(int64_t) Load 289(i64)
|
||||
291: 18(int64_t) ExtInst 1(GLSL.std.450) 7(SSign) 290
|
||||
Store 289(i64) 291
|
||||
292: 52(ivec2) Load 286(i64v)
|
||||
293: 18(int) Load 289(i64)
|
||||
294: 52(ivec2) CompositeConstruct 293 293
|
||||
295: 52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 292 294
|
||||
292: 52(i64vec2) Load 286(i64v)
|
||||
293: 18(int64_t) Load 289(i64)
|
||||
294: 52(i64vec2) CompositeConstruct 293 293
|
||||
295: 52(i64vec2) ExtInst 1(GLSL.std.450) 39(SMin) 292 294
|
||||
Store 286(i64v) 295
|
||||
296: 52(ivec2) Load 286(i64v)
|
||||
298: 52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 296 297
|
||||
296: 52(i64vec2) Load 286(i64v)
|
||||
298: 52(i64vec2) ExtInst 1(GLSL.std.450) 39(SMin) 296 297
|
||||
Store 286(i64v) 298
|
||||
300: 132(ivec3) Load 299(u64v)
|
||||
302: 14(int) Load 301(u64)
|
||||
303: 132(ivec3) CompositeConstruct 302 302 302
|
||||
304: 132(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 300 303
|
||||
300:132(i64vec3) Load 299(u64v)
|
||||
302: 14(int64_t) Load 301(u64)
|
||||
303:132(i64vec3) CompositeConstruct 302 302 302
|
||||
304:132(i64vec3) ExtInst 1(GLSL.std.450) 38(UMin) 300 303
|
||||
Store 299(u64v) 304
|
||||
305: 132(ivec3) Load 299(u64v)
|
||||
307: 132(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 305 306
|
||||
305:132(i64vec3) Load 299(u64v)
|
||||
307:132(i64vec3) ExtInst 1(GLSL.std.450) 38(UMin) 305 306
|
||||
Store 299(u64v) 307
|
||||
308: 52(ivec2) Load 286(i64v)
|
||||
309: 18(int) Load 289(i64)
|
||||
310: 52(ivec2) CompositeConstruct 309 309
|
||||
311: 52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 308 310
|
||||
308: 52(i64vec2) Load 286(i64v)
|
||||
309: 18(int64_t) Load 289(i64)
|
||||
310: 52(i64vec2) CompositeConstruct 309 309
|
||||
311: 52(i64vec2) ExtInst 1(GLSL.std.450) 42(SMax) 308 310
|
||||
Store 286(i64v) 311
|
||||
312: 52(ivec2) Load 286(i64v)
|
||||
313: 52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 312 297
|
||||
312: 52(i64vec2) Load 286(i64v)
|
||||
313: 52(i64vec2) ExtInst 1(GLSL.std.450) 42(SMax) 312 297
|
||||
Store 286(i64v) 313
|
||||
314: 132(ivec3) Load 299(u64v)
|
||||
315: 14(int) Load 301(u64)
|
||||
316: 132(ivec3) CompositeConstruct 315 315 315
|
||||
317: 132(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 314 316
|
||||
314:132(i64vec3) Load 299(u64v)
|
||||
315: 14(int64_t) Load 301(u64)
|
||||
316:132(i64vec3) CompositeConstruct 315 315 315
|
||||
317:132(i64vec3) ExtInst 1(GLSL.std.450) 41(UMax) 314 316
|
||||
Store 299(u64v) 317
|
||||
318: 132(ivec3) Load 299(u64v)
|
||||
319: 132(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 318 306
|
||||
318:132(i64vec3) Load 299(u64v)
|
||||
319:132(i64vec3) ExtInst 1(GLSL.std.450) 41(UMax) 318 306
|
||||
Store 299(u64v) 319
|
||||
320: 52(ivec2) Load 286(i64v)
|
||||
321: 18(int) Load 289(i64)
|
||||
322: 18(int) SNegate 321
|
||||
323: 18(int) Load 289(i64)
|
||||
324: 52(ivec2) CompositeConstruct 322 322
|
||||
325: 52(ivec2) CompositeConstruct 323 323
|
||||
326: 52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 320 324 325
|
||||
320: 52(i64vec2) Load 286(i64v)
|
||||
321: 18(int64_t) Load 289(i64)
|
||||
322: 18(int64_t) SNegate 321
|
||||
323: 18(int64_t) Load 289(i64)
|
||||
324: 52(i64vec2) CompositeConstruct 322 322
|
||||
325: 52(i64vec2) CompositeConstruct 323 323
|
||||
326: 52(i64vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 320 324 325
|
||||
Store 286(i64v) 326
|
||||
327: 52(ivec2) Load 286(i64v)
|
||||
328: 52(ivec2) Load 286(i64v)
|
||||
329: 52(ivec2) SNegate 328
|
||||
330: 52(ivec2) Load 286(i64v)
|
||||
331: 52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 327 329 330
|
||||
327: 52(i64vec2) Load 286(i64v)
|
||||
328: 52(i64vec2) Load 286(i64v)
|
||||
329: 52(i64vec2) SNegate 328
|
||||
330: 52(i64vec2) Load 286(i64v)
|
||||
331: 52(i64vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 327 329 330
|
||||
Store 286(i64v) 331
|
||||
332: 132(ivec3) Load 299(u64v)
|
||||
333: 14(int) Load 301(u64)
|
||||
334: 14(int) SNegate 333
|
||||
335: 14(int) Load 301(u64)
|
||||
336: 132(ivec3) CompositeConstruct 334 334 334
|
||||
337: 132(ivec3) CompositeConstruct 335 335 335
|
||||
338: 132(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 332 336 337
|
||||
332:132(i64vec3) Load 299(u64v)
|
||||
333: 14(int64_t) Load 301(u64)
|
||||
334: 14(int64_t) SNegate 333
|
||||
335: 14(int64_t) Load 301(u64)
|
||||
336:132(i64vec3) CompositeConstruct 334 334 334
|
||||
337:132(i64vec3) CompositeConstruct 335 335 335
|
||||
338:132(i64vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 332 336 337
|
||||
Store 299(u64v) 338
|
||||
339: 132(ivec3) Load 299(u64v)
|
||||
340: 132(ivec3) Load 299(u64v)
|
||||
341: 132(ivec3) SNegate 340
|
||||
342: 132(ivec3) Load 299(u64v)
|
||||
343: 132(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 339 341 342
|
||||
339:132(i64vec3) Load 299(u64v)
|
||||
340:132(i64vec3) Load 299(u64v)
|
||||
341:132(i64vec3) SNegate 340
|
||||
342:132(i64vec3) Load 299(u64v)
|
||||
343:132(i64vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 339 341 342
|
||||
Store 299(u64v) 343
|
||||
344: 19(ptr) AccessChain 286(i64v) 227
|
||||
345: 18(int) Load 344
|
||||
345: 18(int64_t) Load 344
|
||||
346: 19(ptr) AccessChain 286(i64v) 203
|
||||
347: 18(int) Load 346
|
||||
349: 18(int) Select 348 347 345
|
||||
347: 18(int64_t) Load 346
|
||||
349: 18(int64_t) Select 348 347 345
|
||||
Store 289(i64) 349
|
||||
350: 18(int) Load 289(i64)
|
||||
351: 52(ivec2) CompositeConstruct 350 350
|
||||
352: 18(int) Load 289(i64)
|
||||
353: 18(int) SNegate 352
|
||||
354: 52(ivec2) CompositeConstruct 353 353
|
||||
357: 52(ivec2) Select 356 354 351
|
||||
350: 18(int64_t) Load 289(i64)
|
||||
351: 52(i64vec2) CompositeConstruct 350 350
|
||||
352: 18(int64_t) Load 289(i64)
|
||||
353: 18(int64_t) SNegate 352
|
||||
354: 52(i64vec2) CompositeConstruct 353 353
|
||||
357: 52(i64vec2) Select 356 354 351
|
||||
Store 286(i64v) 357
|
||||
358: 40(ptr) AccessChain 299(u64v) 227
|
||||
359: 14(int) Load 358
|
||||
359: 14(int64_t) Load 358
|
||||
360: 40(ptr) AccessChain 299(u64v) 203
|
||||
361: 14(int) Load 360
|
||||
362: 14(int) Select 348 361 359
|
||||
361: 14(int64_t) Load 360
|
||||
362: 14(int64_t) Select 348 361 359
|
||||
Store 301(u64) 362
|
||||
363: 14(int) Load 301(u64)
|
||||
364: 132(ivec3) CompositeConstruct 363 363 363
|
||||
365: 14(int) Load 301(u64)
|
||||
366: 14(int) SNegate 365
|
||||
367: 132(ivec3) CompositeConstruct 366 366 366
|
||||
370: 132(ivec3) Select 369 367 364
|
||||
363: 14(int64_t) Load 301(u64)
|
||||
364:132(i64vec3) CompositeConstruct 363 363 363
|
||||
365: 14(int64_t) Load 301(u64)
|
||||
366: 14(int64_t) SNegate 365
|
||||
367:132(i64vec3) CompositeConstruct 366 366 366
|
||||
370:132(i64vec3) Select 369 367 364
|
||||
Store 299(u64v) 370
|
||||
374: 371(fvec3) Load 373(dv)
|
||||
375: 95(fvec2) VectorShuffle 374 374 0 1
|
||||
376: 52(ivec2) Bitcast 375
|
||||
374:371(f64vec3) Load 373(dv)
|
||||
375: 95(f64vec2) VectorShuffle 374 374 0 1
|
||||
376: 52(i64vec2) Bitcast 375
|
||||
Store 286(i64v) 376
|
||||
378: 377(ptr) AccessChain 373(dv) 217
|
||||
379: 94(float) Load 378
|
||||
380: 14(int) Bitcast 379
|
||||
379:94(float64_t) Load 378
|
||||
380: 14(int64_t) Bitcast 379
|
||||
381: 40(ptr) AccessChain 299(u64v) 227
|
||||
Store 381 380
|
||||
382: 52(ivec2) Load 286(i64v)
|
||||
383: 95(fvec2) Bitcast 382
|
||||
384: 371(fvec3) Load 373(dv)
|
||||
385: 371(fvec3) VectorShuffle 384 383 3 4 2
|
||||
382: 52(i64vec2) Load 286(i64v)
|
||||
383: 95(f64vec2) Bitcast 382
|
||||
384:371(f64vec3) Load 373(dv)
|
||||
385:371(f64vec3) VectorShuffle 384 383 3 4 2
|
||||
Store 373(dv) 385
|
||||
386: 132(ivec3) Load 299(u64v)
|
||||
387: 371(fvec3) Bitcast 386
|
||||
386:132(i64vec3) Load 299(u64v)
|
||||
387:371(f64vec3) Bitcast 386
|
||||
Store 373(dv) 387
|
||||
391: 18(int) Bitcast 390
|
||||
391: 18(int64_t) Bitcast 390
|
||||
Store 289(i64) 391
|
||||
393: 18(int) Load 289(i64)
|
||||
393: 18(int64_t) Load 289(i64)
|
||||
394: 74(ivec2) Bitcast 393
|
||||
Store 392(iv) 394
|
||||
396: 14(int) Bitcast 395
|
||||
396: 14(int64_t) Bitcast 395
|
||||
Store 301(u64) 396
|
||||
398: 14(int) Load 301(u64)
|
||||
398: 14(int64_t) Load 301(u64)
|
||||
399: 81(ivec2) Bitcast 398
|
||||
Store 397(uv) 399
|
||||
402: 132(ivec3) Load 299(u64v)
|
||||
403: 14(int) Load 301(u64)
|
||||
404: 132(ivec3) CompositeConstruct 403 403 403
|
||||
402:132(i64vec3) Load 299(u64v)
|
||||
403: 14(int64_t) Load 301(u64)
|
||||
404:132(i64vec3) CompositeConstruct 403 403 403
|
||||
405: 368(bvec3) ULessThan 402 404
|
||||
Store 401(bv) 405
|
||||
406: 52(ivec2) Load 286(i64v)
|
||||
407: 18(int) Load 289(i64)
|
||||
408: 52(ivec2) CompositeConstruct 407 407
|
||||
406: 52(i64vec2) Load 286(i64v)
|
||||
407: 18(int64_t) Load 289(i64)
|
||||
408: 52(i64vec2) CompositeConstruct 407 407
|
||||
409: 56(bvec2) SLessThan 406 408
|
||||
410: 368(bvec3) Load 401(bv)
|
||||
411: 368(bvec3) VectorShuffle 410 409 3 4 2
|
||||
Store 401(bv) 411
|
||||
412: 132(ivec3) Load 299(u64v)
|
||||
413: 14(int) Load 301(u64)
|
||||
414: 132(ivec3) CompositeConstruct 413 413 413
|
||||
412:132(i64vec3) Load 299(u64v)
|
||||
413: 14(int64_t) Load 301(u64)
|
||||
414:132(i64vec3) CompositeConstruct 413 413 413
|
||||
415: 368(bvec3) ULessThanEqual 412 414
|
||||
Store 401(bv) 415
|
||||
416: 52(ivec2) Load 286(i64v)
|
||||
417: 18(int) Load 289(i64)
|
||||
418: 52(ivec2) CompositeConstruct 417 417
|
||||
416: 52(i64vec2) Load 286(i64v)
|
||||
417: 18(int64_t) Load 289(i64)
|
||||
418: 52(i64vec2) CompositeConstruct 417 417
|
||||
419: 56(bvec2) SLessThanEqual 416 418
|
||||
420: 368(bvec3) Load 401(bv)
|
||||
421: 368(bvec3) VectorShuffle 420 419 3 4 2
|
||||
Store 401(bv) 421
|
||||
422: 132(ivec3) Load 299(u64v)
|
||||
423: 14(int) Load 301(u64)
|
||||
424: 132(ivec3) CompositeConstruct 423 423 423
|
||||
422:132(i64vec3) Load 299(u64v)
|
||||
423: 14(int64_t) Load 301(u64)
|
||||
424:132(i64vec3) CompositeConstruct 423 423 423
|
||||
425: 368(bvec3) UGreaterThan 422 424
|
||||
Store 401(bv) 425
|
||||
426: 52(ivec2) Load 286(i64v)
|
||||
427: 18(int) Load 289(i64)
|
||||
428: 52(ivec2) CompositeConstruct 427 427
|
||||
426: 52(i64vec2) Load 286(i64v)
|
||||
427: 18(int64_t) Load 289(i64)
|
||||
428: 52(i64vec2) CompositeConstruct 427 427
|
||||
429: 56(bvec2) SGreaterThan 426 428
|
||||
430: 368(bvec3) Load 401(bv)
|
||||
431: 368(bvec3) VectorShuffle 430 429 3 4 2
|
||||
Store 401(bv) 431
|
||||
432: 132(ivec3) Load 299(u64v)
|
||||
433: 14(int) Load 301(u64)
|
||||
434: 132(ivec3) CompositeConstruct 433 433 433
|
||||
432:132(i64vec3) Load 299(u64v)
|
||||
433: 14(int64_t) Load 301(u64)
|
||||
434:132(i64vec3) CompositeConstruct 433 433 433
|
||||
435: 368(bvec3) UGreaterThanEqual 432 434
|
||||
Store 401(bv) 435
|
||||
436: 52(ivec2) Load 286(i64v)
|
||||
437: 18(int) Load 289(i64)
|
||||
438: 52(ivec2) CompositeConstruct 437 437
|
||||
436: 52(i64vec2) Load 286(i64v)
|
||||
437: 18(int64_t) Load 289(i64)
|
||||
438: 52(i64vec2) CompositeConstruct 437 437
|
||||
439: 56(bvec2) SGreaterThanEqual 436 438
|
||||
440: 368(bvec3) Load 401(bv)
|
||||
441: 368(bvec3) VectorShuffle 440 439 3 4 2
|
||||
Store 401(bv) 441
|
||||
442: 132(ivec3) Load 299(u64v)
|
||||
443: 14(int) Load 301(u64)
|
||||
444: 132(ivec3) CompositeConstruct 443 443 443
|
||||
442:132(i64vec3) Load 299(u64v)
|
||||
443: 14(int64_t) Load 301(u64)
|
||||
444:132(i64vec3) CompositeConstruct 443 443 443
|
||||
445: 368(bvec3) IEqual 442 444
|
||||
Store 401(bv) 445
|
||||
446: 52(ivec2) Load 286(i64v)
|
||||
447: 18(int) Load 289(i64)
|
||||
448: 52(ivec2) CompositeConstruct 447 447
|
||||
446: 52(i64vec2) Load 286(i64v)
|
||||
447: 18(int64_t) Load 289(i64)
|
||||
448: 52(i64vec2) CompositeConstruct 447 447
|
||||
449: 56(bvec2) IEqual 446 448
|
||||
450: 368(bvec3) Load 401(bv)
|
||||
451: 368(bvec3) VectorShuffle 450 449 3 4 2
|
||||
Store 401(bv) 451
|
||||
452: 132(ivec3) Load 299(u64v)
|
||||
453: 14(int) Load 301(u64)
|
||||
454: 132(ivec3) CompositeConstruct 453 453 453
|
||||
452:132(i64vec3) Load 299(u64v)
|
||||
453: 14(int64_t) Load 301(u64)
|
||||
454:132(i64vec3) CompositeConstruct 453 453 453
|
||||
455: 368(bvec3) INotEqual 452 454
|
||||
Store 401(bv) 455
|
||||
456: 52(ivec2) Load 286(i64v)
|
||||
457: 18(int) Load 289(i64)
|
||||
458: 52(ivec2) CompositeConstruct 457 457
|
||||
456: 52(i64vec2) Load 286(i64v)
|
||||
457: 18(int64_t) Load 289(i64)
|
||||
458: 52(i64vec2) CompositeConstruct 457 457
|
||||
459: 56(bvec2) INotEqual 456 458
|
||||
460: 368(bvec3) Load 401(bv)
|
||||
461: 368(bvec3) VectorShuffle 460 459 3 4 2
|
||||
|
||||
Reference in New Issue
Block a user