Add bit width of types to disassembleInstruction
This commit is contained in:
@@ -54,8 +54,8 @@ spv.subgroupClustered.comp
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20: TypeVector 19(int) 4
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21: TypeVector 6(int) 4
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22: TypeFloat 64
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23: TypeVector 22(float) 4
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24(Buffers): TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(fvec4)
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23: TypeVector 22(float64_t) 4
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24(Buffers): TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(f64vec4)
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25: TypeArray 24(Buffers) 15
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26: TypePointer Uniform 25
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27(data): 26(ptr) Variable Uniform
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@@ -78,10 +78,10 @@ spv.subgroupClustered.comp
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102: TypeVector 6(int) 2
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103: TypePointer Uniform 21(ivec4)
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112: TypeVector 6(int) 3
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126: TypePointer Uniform 22(float)
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132: TypeVector 22(float) 2
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133: TypePointer Uniform 23(fvec4)
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142: TypeVector 22(float) 3
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126: TypePointer Uniform 22(float64_t)
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132: TypeVector 22(float64_t) 2
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133: TypePointer Uniform 23(f64vec4)
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142: TypeVector 22(float64_t) 3
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522: TypeBool
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531: 72(ivec2) ConstantComposite 29 29
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532: TypeVector 522(bool) 2
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@@ -194,32 +194,32 @@ spv.subgroupClustered.comp
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Store 124 123
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125: 6(int) Load 8(invocation)
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127: 126(ptr) AccessChain 27(data) 29 60 30
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128: 22(float) Load 127
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129: 22(float) GroupNonUniformFAdd 35 ClusteredReduce 128 34
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128:22(float64_t) Load 127
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129:22(float64_t) GroupNonUniformFAdd 35 ClusteredReduce 128 34
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130: 126(ptr) AccessChain 27(data) 125 60 30
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Store 130 129
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131: 6(int) Load 8(invocation)
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134: 133(ptr) AccessChain 27(data) 39 60
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135: 23(fvec4) Load 134
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136: 132(fvec2) VectorShuffle 135 135 0 1
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137: 132(fvec2) GroupNonUniformFAdd 35 ClusteredReduce 136 34
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135: 23(f64vec4) Load 134
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136:132(f64vec2) VectorShuffle 135 135 0 1
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137:132(f64vec2) GroupNonUniformFAdd 35 ClusteredReduce 136 34
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138: 133(ptr) AccessChain 27(data) 131 60
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139: 23(fvec4) Load 138
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140: 23(fvec4) VectorShuffle 139 137 4 5 2 3
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139: 23(f64vec4) Load 138
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140: 23(f64vec4) VectorShuffle 139 137 4 5 2 3
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Store 138 140
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141: 6(int) Load 8(invocation)
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143: 133(ptr) AccessChain 27(data) 50 60
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144: 23(fvec4) Load 143
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145: 142(fvec3) VectorShuffle 144 144 0 1 2
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146: 142(fvec3) GroupNonUniformFAdd 35 ClusteredReduce 145 34
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144: 23(f64vec4) Load 143
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145:142(f64vec3) VectorShuffle 144 144 0 1 2
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146:142(f64vec3) GroupNonUniformFAdd 35 ClusteredReduce 145 34
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147: 133(ptr) AccessChain 27(data) 141 60
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148: 23(fvec4) Load 147
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149: 23(fvec4) VectorShuffle 148 146 4 5 6 3
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148: 23(f64vec4) Load 147
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149: 23(f64vec4) VectorShuffle 148 146 4 5 6 3
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Store 147 149
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150: 6(int) Load 8(invocation)
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151: 133(ptr) AccessChain 27(data) 60 60
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152: 23(fvec4) Load 151
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153: 23(fvec4) GroupNonUniformFAdd 35 ClusteredReduce 152 34
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152: 23(f64vec4) Load 151
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153: 23(f64vec4) GroupNonUniformFAdd 35 ClusteredReduce 152 34
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154: 133(ptr) AccessChain 27(data) 150 60
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Store 154 153
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155: 6(int) Load 8(invocation)
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@@ -314,32 +314,32 @@ spv.subgroupClustered.comp
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Store 232 231
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233: 6(int) Load 8(invocation)
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234: 126(ptr) AccessChain 27(data) 29 60 30
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235: 22(float) Load 234
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236: 22(float) GroupNonUniformFMul 35 ClusteredReduce 235 34
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235:22(float64_t) Load 234
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236:22(float64_t) GroupNonUniformFMul 35 ClusteredReduce 235 34
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237: 126(ptr) AccessChain 27(data) 233 60 30
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Store 237 236
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238: 6(int) Load 8(invocation)
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239: 133(ptr) AccessChain 27(data) 39 60
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240: 23(fvec4) Load 239
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241: 132(fvec2) VectorShuffle 240 240 0 1
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242: 132(fvec2) GroupNonUniformFMul 35 ClusteredReduce 241 34
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240: 23(f64vec4) Load 239
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241:132(f64vec2) VectorShuffle 240 240 0 1
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242:132(f64vec2) GroupNonUniformFMul 35 ClusteredReduce 241 34
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243: 133(ptr) AccessChain 27(data) 238 60
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244: 23(fvec4) Load 243
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245: 23(fvec4) VectorShuffle 244 242 4 5 2 3
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244: 23(f64vec4) Load 243
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245: 23(f64vec4) VectorShuffle 244 242 4 5 2 3
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Store 243 245
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246: 6(int) Load 8(invocation)
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247: 133(ptr) AccessChain 27(data) 50 60
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248: 23(fvec4) Load 247
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249: 142(fvec3) VectorShuffle 248 248 0 1 2
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250: 142(fvec3) GroupNonUniformFMul 35 ClusteredReduce 249 34
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248: 23(f64vec4) Load 247
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249:142(f64vec3) VectorShuffle 248 248 0 1 2
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250:142(f64vec3) GroupNonUniformFMul 35 ClusteredReduce 249 34
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251: 133(ptr) AccessChain 27(data) 246 60
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252: 23(fvec4) Load 251
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253: 23(fvec4) VectorShuffle 252 250 4 5 6 3
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252: 23(f64vec4) Load 251
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253: 23(f64vec4) VectorShuffle 252 250 4 5 6 3
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Store 251 253
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254: 6(int) Load 8(invocation)
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255: 133(ptr) AccessChain 27(data) 60 60
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256: 23(fvec4) Load 255
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257: 23(fvec4) GroupNonUniformFMul 35 ClusteredReduce 256 34
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256: 23(f64vec4) Load 255
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257: 23(f64vec4) GroupNonUniformFMul 35 ClusteredReduce 256 34
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258: 133(ptr) AccessChain 27(data) 254 60
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Store 258 257
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259: 6(int) Load 8(invocation)
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@@ -434,32 +434,32 @@ spv.subgroupClustered.comp
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Store 336 335
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337: 6(int) Load 8(invocation)
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338: 126(ptr) AccessChain 27(data) 29 60 30
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339: 22(float) Load 338
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340: 22(float) GroupNonUniformFMin 35 ClusteredReduce 339 34
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339:22(float64_t) Load 338
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340:22(float64_t) GroupNonUniformFMin 35 ClusteredReduce 339 34
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341: 126(ptr) AccessChain 27(data) 337 60 30
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Store 341 340
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342: 6(int) Load 8(invocation)
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343: 133(ptr) AccessChain 27(data) 39 60
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344: 23(fvec4) Load 343
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345: 132(fvec2) VectorShuffle 344 344 0 1
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346: 132(fvec2) GroupNonUniformFMin 35 ClusteredReduce 345 34
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344: 23(f64vec4) Load 343
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345:132(f64vec2) VectorShuffle 344 344 0 1
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346:132(f64vec2) GroupNonUniformFMin 35 ClusteredReduce 345 34
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347: 133(ptr) AccessChain 27(data) 342 60
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348: 23(fvec4) Load 347
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349: 23(fvec4) VectorShuffle 348 346 4 5 2 3
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348: 23(f64vec4) Load 347
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349: 23(f64vec4) VectorShuffle 348 346 4 5 2 3
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Store 347 349
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350: 6(int) Load 8(invocation)
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351: 133(ptr) AccessChain 27(data) 50 60
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352: 23(fvec4) Load 351
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353: 142(fvec3) VectorShuffle 352 352 0 1 2
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354: 142(fvec3) GroupNonUniformFMin 35 ClusteredReduce 353 34
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352: 23(f64vec4) Load 351
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353:142(f64vec3) VectorShuffle 352 352 0 1 2
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354:142(f64vec3) GroupNonUniformFMin 35 ClusteredReduce 353 34
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355: 133(ptr) AccessChain 27(data) 350 60
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356: 23(fvec4) Load 355
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357: 23(fvec4) VectorShuffle 356 354 4 5 6 3
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356: 23(f64vec4) Load 355
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357: 23(f64vec4) VectorShuffle 356 354 4 5 6 3
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Store 355 357
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358: 6(int) Load 8(invocation)
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359: 133(ptr) AccessChain 27(data) 60 60
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360: 23(fvec4) Load 359
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361: 23(fvec4) GroupNonUniformFMin 35 ClusteredReduce 360 34
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360: 23(f64vec4) Load 359
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361: 23(f64vec4) GroupNonUniformFMin 35 ClusteredReduce 360 34
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362: 133(ptr) AccessChain 27(data) 358 60
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Store 362 361
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363: 6(int) Load 8(invocation)
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@@ -554,32 +554,32 @@ spv.subgroupClustered.comp
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Store 440 439
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441: 6(int) Load 8(invocation)
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442: 126(ptr) AccessChain 27(data) 29 60 30
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443: 22(float) Load 442
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444: 22(float) GroupNonUniformFMax 35 ClusteredReduce 443 34
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443:22(float64_t) Load 442
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444:22(float64_t) GroupNonUniformFMax 35 ClusteredReduce 443 34
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445: 126(ptr) AccessChain 27(data) 441 60 30
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Store 445 444
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446: 6(int) Load 8(invocation)
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447: 133(ptr) AccessChain 27(data) 39 60
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448: 23(fvec4) Load 447
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449: 132(fvec2) VectorShuffle 448 448 0 1
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450: 132(fvec2) GroupNonUniformFMax 35 ClusteredReduce 449 34
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448: 23(f64vec4) Load 447
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449:132(f64vec2) VectorShuffle 448 448 0 1
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450:132(f64vec2) GroupNonUniformFMax 35 ClusteredReduce 449 34
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451: 133(ptr) AccessChain 27(data) 446 60
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452: 23(fvec4) Load 451
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453: 23(fvec4) VectorShuffle 452 450 4 5 2 3
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452: 23(f64vec4) Load 451
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453: 23(f64vec4) VectorShuffle 452 450 4 5 2 3
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Store 451 453
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454: 6(int) Load 8(invocation)
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455: 133(ptr) AccessChain 27(data) 50 60
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456: 23(fvec4) Load 455
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457: 142(fvec3) VectorShuffle 456 456 0 1 2
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458: 142(fvec3) GroupNonUniformFMax 35 ClusteredReduce 457 34
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456: 23(f64vec4) Load 455
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457:142(f64vec3) VectorShuffle 456 456 0 1 2
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458:142(f64vec3) GroupNonUniformFMax 35 ClusteredReduce 457 34
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459: 133(ptr) AccessChain 27(data) 454 60
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460: 23(fvec4) Load 459
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461: 23(fvec4) VectorShuffle 460 458 4 5 6 3
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460: 23(f64vec4) Load 459
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461: 23(f64vec4) VectorShuffle 460 458 4 5 6 3
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Store 459 461
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462: 6(int) Load 8(invocation)
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463: 133(ptr) AccessChain 27(data) 60 60
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464: 23(fvec4) Load 463
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465: 23(fvec4) GroupNonUniformFMax 35 ClusteredReduce 464 34
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464: 23(f64vec4) Load 463
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465: 23(f64vec4) GroupNonUniformFMax 35 ClusteredReduce 464 34
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466: 133(ptr) AccessChain 27(data) 462 60
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Store 466 465
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467: 6(int) Load 8(invocation)
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