WIP: HLSL: hlsl register class iomapping

Adds --hlsl-iomap option to perform IO mapping in HLSL register space.

--shift-cbuffer-binding is now a synonym for --shift-ubo-binding.

The idea way to do this seems to be passing in a dedicated IO resolver, but
that would require more intrusive restructuring, so maybe best for its
own PR.

The TDefaultHlslIoResolver class and the former TDefaultIoResolver class
share quite a bit of mechanism in a common base class.

TODO: tbuffers are landing in the wrong register class, which needs some
investigation.  They're either wrong upstream, or the detection in the
resolver is wrong.

Test/baseResults/hlsl.automap.frag.out

@@ -0,0 +1,27 @@
+hlsl.automap.frag
+Uniform reflection:
+t1: offset -1, type 8b5d, size 1, index -1, binding 11
+t2: offset -1, type 8b5e, size 1, index -1, binding 12
+t3: offset -1, type 8b5f, size 1, index -1, binding 13
+t4.@data: offset 0, type 8b52, size 1, index 0, binding -1
+t5.@data: offset 0, type 1405, size 0, index 1, binding -1
+t6: offset -1, type 8dc2, size 1, index -1, binding 16
+s1: offset -1, type 0, size 1, index -1, binding 31
+s2: offset -1, type 0, size 1, index -1, binding 32
+u1: offset -1, type 904c, size 1, index -1, binding 41
+u2: offset -1, type 904d, size 1, index -1, binding 42
+u3: offset -1, type 904e, size 1, index -1, binding 43
+u4: offset -1, type 9051, size 1, index -1, binding 44
+u5.@data: offset 0, type 1405, size 0, index 2, binding -1
+u6.@data: offset 0, type 1406, size 1, index 3, binding -1
+cb1: offset 0, type 1404, size 1, index 4, binding -1
+
+Uniform block reflection:
+t4: offset -1, type ffffffff, size 0, index -1, binding 14
+t5: offset -1, type ffffffff, size 0, index -1, binding 15
+u5: offset -1, type ffffffff, size 0, index -1, binding 45
+u6: offset -1, type ffffffff, size 0, index -1, binding 46
+cb: offset -1, type ffffffff, size 4, index -1, binding 51
+
+Vertex attribute reflection:
+

Test/hlsl.automap.frag

@@ -0,0 +1,57 @@
+// Test register class offsets for different resource types
+
+SamplerState       s1 : register(s1);
+SamplerComparisonState s2 : register(s2);
+
+Texture1D <float4> t1 : register(t1);
+Texture2D <float4> t2 : register(t2);
+Texture3D <float4> t3 : register(t3);
+StructuredBuffer<float4> t4 : register(t4);
+ByteAddressBuffer t5 : register(t5);
+Buffer<float4> t6 : register(t6);
+
+RWTexture1D <float4> u1 : register(u1);
+RWTexture2D <float4> u2 : register(u2);
+RWTexture3D <float4> u3 : register(u3);
+
+RWBuffer <float> u4 : register(u4);
+RWByteAddressBuffer u5 : register(u5);
+RWStructuredBuffer<float> u6 : register(u6);
+AppendStructuredBuffer<float> u7 : register(u7);
+ConsumeStructuredBuffer<float> u8 : register(u8);
+
+cbuffer cb : register(b1) {
+    int cb1;
+};
+
+// tbuffer tb : register(t7) {
+//     int tb1;
+// };
+
+float4 main() : SV_Target0
+{
+    t1;
+    t2;
+    t3;
+    t4[0];
+    t5.Load(0);
+    t6;
+
+    s1;
+    s2;
+
+    u1;
+    u2;
+    u3;
+
+    u4[0];
+    u5.Load(0);
+    u6[0];
+    u7[0];
+    u8[0];
+
+    cb1;
+    // tb1; TODO: wrong type?
+
+    return 0;
+}

Test/runtests

@@ -35,7 +35,8 @@ $EXE -D -e flizv -l -q -C -V hlsl.reflection.vert > $TARGETDIR/hlsl.reflection.v
 diff -b $BASEDIR/hlsl.reflection.vert.out $TARGETDIR/hlsl.reflection.vert.out || HASERROR=1
 $EXE -D -e main -l -q -C -V hlsl.reflection.binding.frag > $TARGETDIR/hlsl.reflection.binding.frag.out
 diff -b $BASEDIR/hlsl.reflection.binding.frag.out $TARGETDIR/hlsl.reflection.binding.frag.out || HASERROR=1
-
+$EXE -D -e main -l -q --hlsl-iomap --auto-map-bindings --stb 10 --sbb 20 --ssb 30 --suavb 40 --scb 50 -D -V -e main hlsl.automap.frag > $TARGETDIR/hlsl.automap.frag.out
+diff -b $BASEDIR/hlsl.automap.frag.out $TARGETDIR/hlsl.automap.frag.out || HASERROR=1
 
 #
 # multi-threaded test