WIP: HLSL: hlsl register class iomapping
Adds --hlsl-iomap option to perform IO mapping in HLSL register space. --shift-cbuffer-binding is now a synonym for --shift-ubo-binding. The idea way to do this seems to be passing in a dedicated IO resolver, but that would require more intrusive restructuring, so maybe best for its own PR. The TDefaultHlslIoResolver class and the former TDefaultIoResolver class share quite a bit of mechanism in a common base class. TODO: tbuffers are landing in the wrong register class, which needs some investigation. They're either wrong upstream, or the detection in the resolver is wrong.
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57
Test/hlsl.automap.frag
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57
Test/hlsl.automap.frag
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// Test register class offsets for different resource types
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SamplerState s1 : register(s1);
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SamplerComparisonState s2 : register(s2);
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Texture1D <float4> t1 : register(t1);
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Texture2D <float4> t2 : register(t2);
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Texture3D <float4> t3 : register(t3);
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StructuredBuffer<float4> t4 : register(t4);
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ByteAddressBuffer t5 : register(t5);
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Buffer<float4> t6 : register(t6);
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RWTexture1D <float4> u1 : register(u1);
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RWTexture2D <float4> u2 : register(u2);
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RWTexture3D <float4> u3 : register(u3);
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RWBuffer <float> u4 : register(u4);
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RWByteAddressBuffer u5 : register(u5);
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RWStructuredBuffer<float> u6 : register(u6);
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AppendStructuredBuffer<float> u7 : register(u7);
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ConsumeStructuredBuffer<float> u8 : register(u8);
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cbuffer cb : register(b1) {
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int cb1;
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};
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// tbuffer tb : register(t7) {
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// int tb1;
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// };
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float4 main() : SV_Target0
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{
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t1;
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t2;
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t3;
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t4[0];
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t5.Load(0);
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t6;
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s1;
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s2;
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u1;
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u2;
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u3;
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u4[0];
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u5.Load(0);
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u6[0];
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u7[0];
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u8[0];
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cb1;
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// tb1; TODO: wrong type?
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return 0;
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}
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