HLSL: Move debug naming to a simpler, more consistent, scheme.
This will help in expanding flattening and reducing splitting.
This commit is contained in:
@@ -54,7 +54,7 @@ vertex spacing = equal_spacing
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0:? Sequence
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0:? move second child to first child ( temp float)
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0:? direct index ( patch out float TessLevelOuter)
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0:? '@patchConstantOutput_edges' ( patch out 4-element array of float TessLevelOuter)
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0:? '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
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0:? Constant:
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0:? 0 (const int)
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0:? direct index ( temp float)
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@@ -66,7 +66,7 @@ vertex spacing = equal_spacing
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0:? 0 (const int)
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0:? move second child to first child ( temp float)
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0:? direct index ( patch out float TessLevelOuter)
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0:? '@patchConstantOutput_edges' ( patch out 4-element array of float TessLevelOuter)
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0:? '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
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0:? Constant:
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0:? 1 (const int)
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0:? direct index ( temp float)
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@@ -107,7 +107,7 @@ vertex spacing = equal_spacing
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0:? 'ip' (layout( location=0) in 4-element array of structure{ temp 3-component vector of float cpoint})
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0:? 'm_cpid' ( in uint InvocationID)
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0:? 'pid' ( in uint PrimitiveID)
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0:? '@patchConstantOutput_edges' ( patch out 4-element array of float TessLevelOuter)
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0:? '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
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Linked tessellation control stage:
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@@ -168,7 +168,7 @@ vertex spacing = equal_spacing
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0:? Sequence
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0:? move second child to first child ( temp float)
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0:? direct index ( patch out float TessLevelOuter)
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0:? '@patchConstantOutput_edges' ( patch out 4-element array of float TessLevelOuter)
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0:? '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
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0:? Constant:
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0:? 0 (const int)
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0:? direct index ( temp float)
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@@ -180,7 +180,7 @@ vertex spacing = equal_spacing
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0:? 0 (const int)
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0:? move second child to first child ( temp float)
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0:? direct index ( patch out float TessLevelOuter)
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0:? '@patchConstantOutput_edges' ( patch out 4-element array of float TessLevelOuter)
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0:? '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
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0:? Constant:
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0:? 1 (const int)
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0:? direct index ( temp float)
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@@ -221,7 +221,7 @@ vertex spacing = equal_spacing
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0:? 'ip' (layout( location=0) in 4-element array of structure{ temp 3-component vector of float cpoint})
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0:? 'm_cpid' ( in uint InvocationID)
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0:? 'pid' ( in uint PrimitiveID)
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0:? '@patchConstantOutput_edges' ( patch out 4-element array of float TessLevelOuter)
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0:? '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
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// Module Version 10000
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// Generated by (magic number): 80001
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@@ -258,14 +258,14 @@ vertex spacing = equal_spacing
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Name 65 "@patchConstantResult"
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Name 66 "pid"
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Name 67 "param"
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Name 72 "@patchConstantOutput_edges"
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Name 72 "@patchConstantOutput.edges"
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Name 82 "output"
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Decorate 40(ip) Location 0
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Decorate 44(m_cpid) BuiltIn InvocationId
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Decorate 48(@entryPointOutput) Location 0
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Decorate 66(pid) BuiltIn PrimitiveId
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Decorate 72(@patchConstantOutput_edges) Patch
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Decorate 72(@patchConstantOutput_edges) BuiltIn TessLevelOuter
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Decorate 72(@patchConstantOutput.edges) Patch
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Decorate 72(@patchConstantOutput.edges) BuiltIn TessLevelOuter
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2: TypeVoid
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3: TypeFunction 2
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6: TypeFloat 32
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@@ -301,7 +301,7 @@ vertex spacing = equal_spacing
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66(pid): 43(ptr) Variable Input
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70: TypeArray 6(float) 10
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71: TypePointer Output 70
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72(@patchConstantOutput_edges): 71(ptr) Variable Output
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72(@patchConstantOutput.edges): 71(ptr) Variable Output
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73: TypePointer Function 6(float)
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76: TypePointer Output 6(float)
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78: 29(int) Constant 1
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@@ -339,11 +339,11 @@ vertex spacing = equal_spacing
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Store 65(@patchConstantResult) 69
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74: 73(ptr) AccessChain 65(@patchConstantResult) 30 30
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75: 6(float) Load 74
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77: 76(ptr) AccessChain 72(@patchConstantOutput_edges) 30
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77: 76(ptr) AccessChain 72(@patchConstantOutput.edges) 30
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Store 77 75
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79: 73(ptr) AccessChain 65(@patchConstantResult) 30 78
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80: 6(float) Load 79
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81: 76(ptr) AccessChain 72(@patchConstantOutput_edges) 78
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81: 76(ptr) AccessChain 72(@patchConstantOutput.edges) 78
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Store 81 80
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Branch 63
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63: Label
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