diff --git a/SPIRV/SpvBuilder.cpp b/SPIRV/SpvBuilder.cpp
index dbcd981d..6699a0c1 100644
--- a/SPIRV/SpvBuilder.cpp
+++ b/SPIRV/SpvBuilder.cpp
@@ -1857,8 +1857,9 @@ void Builder::accessChainStore(Id rvalue)
         Id tempBaseId = createLoad(base);
         source = createLvalueSwizzle(getTypeId(tempBaseId), tempBaseId, rvalue, accessChain.swizzle);
     } else if (accessChain.component) {
-        Instruction* vectorInsert = new Instruction(getUniqueId(), getTypeId(rvalue), OpVectorInsertDynamic);
-        vectorInsert->addIdOperand(createLoad(base));
+        Id tempBaseId = createLoad(base);
+        Instruction* vectorInsert = new Instruction(getUniqueId(), getTypeId(tempBaseId), OpVectorInsertDynamic);
+        vectorInsert->addIdOperand(tempBaseId);
         vectorInsert->addIdOperand(rvalue);
         vectorInsert->addIdOperand(accessChain.component);
         buildPoint->addInstruction(vectorInsert);
diff --git a/Test/baseResults/spv.forLoop.frag.out b/Test/baseResults/spv.forLoop.frag.out
index 13cbe631..0d08293d 100644
--- a/Test/baseResults/spv.forLoop.frag.out
+++ b/Test/baseResults/spv.forLoop.frag.out
@@ -131,9 +131,9 @@ Linked fragment stage:
               70:     48(int)   VectorExtractDynamic 69 68
               72:     48(int)   IMul 70 71
               73:    7(float)   ConvertUToF 72
-              75:    8(fvec4)   Load 66(tv4) 
-              74:    7(float)   VectorInsertDynamic 75 73 67
-                                Store 66(tv4) 74 
+              74:    8(fvec4)   Load 66(tv4) 
+              75:    8(fvec4)   VectorInsertDynamic 74 73 67
+                                Store 66(tv4) 75 
               76:     14(int)   Load 60(i) 
               77:     14(int)   IAdd 76 33
                                 Store 60(i) 77