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Reflection exposes the Shader Stages where a Uniform is present

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dmpakas
2018-07-10 18:25:48 +03:00
parent 64315a8aed
commit f556e5da26
9 changed files with 241 additions and 228 deletions
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44
Test/baseResults/hlsl.shift.per-set.frag.out
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@@ -196,30 +196,30 @@ gl_FragCoord origin is upper left
0:? '@entryPointOutput' (layout( location=0) out 4-component vector of float)
Uniform reflection:
t1: offset -1, type 8b5d, size 1, index -1, binding 21
t2: offset -1, type 8b5e, size 1, index -1, binding 22
t3: offset -1, type 8b5f, size 1, index -1, binding 26
t4.@data: offset 0, type 8b52, size 1, index 0, binding -1
t5.@data: offset 0, type 1405, size 0, index 1, binding -1
t6: offset -1, type 8dc2, size 1, index -1, binding 23
s1: offset -1, type 0, size 1, index -1, binding 11
s2: offset -1, type 0, size 1, index -1, binding 17
u1: offset -1, type 904c, size 1, index -1, binding 31
u2: offset -1, type 904d, size 1, index -1, binding 42
u3: offset -1, type 904e, size 1, index -1, binding 43
u4: offset -1, type 9051, size 1, index -1, binding 34
u5.@data: offset 0, type 1405, size 0, index 2, binding -1
u6.@data: offset 0, type 1406, size 1, index 3, binding -1
cb1: offset 0, type 1404, size 1, index 4, binding -1
tb1: offset 0, type 1404, size 1, index 5, binding -1
t1: offset -1, type 8b5d, size 1, index -1, binding 21, stages 16
t2: offset -1, type 8b5e, size 1, index -1, binding 22, stages 16
t3: offset -1, type 8b5f, size 1, index -1, binding 26, stages 16
t4.@data: offset 0, type 8b52, size 1, index 0, binding -1, stages 16
t5.@data: offset 0, type 1405, size 0, index 1, binding -1, stages 16
t6: offset -1, type 8dc2, size 1, index -1, binding 23, stages 16
s1: offset -1, type 0, size 1, index -1, binding 11, stages 16
s2: offset -1, type 0, size 1, index -1, binding 17, stages 16
u1: offset -1, type 904c, size 1, index -1, binding 31, stages 16
u2: offset -1, type 904d, size 1, index -1, binding 42, stages 16
u3: offset -1, type 904e, size 1, index -1, binding 43, stages 16
u4: offset -1, type 9051, size 1, index -1, binding 34, stages 16
u5.@data: offset 0, type 1405, size 0, index 2, binding -1, stages 16
u6.@data: offset 0, type 1406, size 1, index 3, binding -1, stages 16
cb1: offset 0, type 1404, size 1, index 4, binding -1, stages 16
tb1: offset 0, type 1404, size 1, index 5, binding -1, stages 16
Uniform block reflection:
t4: offset -1, type ffffffff, size 0, index -1, binding 21
t5: offset -1, type ffffffff, size 0, index -1, binding 22
u5: offset -1, type ffffffff, size 0, index -1, binding 44
u6: offset -1, type ffffffff, size 0, index -1, binding 34
cb: offset -1, type ffffffff, size 4, index -1, binding 51
tb: offset -1, type ffffffff, size 4, index -1, binding 27
t4: offset -1, type ffffffff, size 0, index -1, binding 21, stages 0
t5: offset -1, type ffffffff, size 0, index -1, binding 22, stages 0
u5: offset -1, type ffffffff, size 0, index -1, binding 44, stages 0
u6: offset -1, type ffffffff, size 0, index -1, binding 34, stages 0
cb: offset -1, type ffffffff, size 4, index -1, binding 51, stages 0
tb: offset -1, type ffffffff, size 4, index -1, binding 27, stages 0
Vertex attribute reflection: