22 Commits

Author SHA1 Message Date
Jeremy Hayes
78221d619e Update CHANGES for release 11.12.0 2022-10-13 10:58:53 -06:00
Graeme Leese
182ab460d9 Update test expected files with new magic number
Updating the SPIR-V generator version number changes the output of all
the SPIR-V tests.
2020-06-22 11:49:38 +01:00
John Kessenich
3641ff7378 Bump code gen version, due to removal of OpEntryPoint operands. 2020-06-10 07:40:56 -06:00
greg-lunarg
7c753a7253
Flatten all interface variables (#2217)
Specifically, add flattening of arrayed io for geometry and
tesselation shaders. Previously some interface structs just had
builtins split out which caused some interfaces to not be exactly
the same as that of flattened adjacent stages, affecting validation
and correctness.

This obviates builtin splitting. That will be removed in a followup
commit. It was left in for this commit to better exhibit the functional
changes that were made.

Fixes #1660.
2020-05-18 02:13:10 -06:00
John Kessenich
31c3370d83 Bump up the generator version, which is exposed in SPV test results. 2019-11-02 21:26:40 -06:00
John Kessenich
d6c975572e Change the major revision number for next commit. 2018-06-04 15:33:31 -06:00
John Kessenich
ac3707921e Revert the commits that change OpArrayLength type and bumped the version number.
Now, version 5.* is all connected to making the uint type, which doesn't quite work.
Generator versions 4 and 6 do not do this.
2018-03-07 11:48:25 -07:00
John Kessenich
0216f24f0e SPV: Bump up the generator number. 2018-03-03 11:47:07 -07:00
John Kessenich
71b5da60d0 SPV: Bump up generator number, because previous commit changes code gen slightly. 2018-02-06 08:06:36 -07:00
John Kessenich
2b5ea9f851 SPV Version: Emit the requested SPIR-V version, not the header version.
Fixes #1236.
2018-01-31 18:41:59 -07:00
John Kessenich
6c1c2766b6 SPV: Bump SPIR-V header to the unified1 version (version 1.2). 2018-01-29 16:16:11 -07:00
John Kessenich
c72e5937dd SPV: Bump the generator number to account for barrier changes. 2017-12-16 00:34:08 -07:00
John Kessenich
8297936dd6 SPV: Change barrier emission to conform to Khronos decisions.
The memory model group agreed to these definitions for how
to map GLSL barrier, memoryBarrier, etc. With HLSL following suit.
2017-12-16 00:30:10 -07:00
John Kessenich
07ed11f9a0 SPV: GeneratorVersion: bump version number because of atomic decrement change. 2017-10-07 11:41:20 -06:00
LoopDawg
a5d8616478 HLSL: allow mixed user & builtin members in hull shader output structure
Hull shaders have an implicitly arrayed output.  This is handled by creating an arrayed form of the
provided output type, and writing to the element of it indexed by InvocationID.

The implicit indirection into that array was causing some troubles when copying to a split
structure.  handleAssign was able to handle simple symbol lvalues, but not an lvalue composed
of an indirection into an array.
2017-09-14 16:50:37 -06:00
John Kessenich
e516d4335f HLSL: Move debug naming to a simpler, more consistent, scheme.
This will help in expanding flattening and reducing splitting.
2017-08-09 14:29:29 -06:00
John Kessenich
cca42a8ea6 HLSL: Stop including empty structures in the I/O interface. Fix #785. 2017-08-03 18:41:48 -06:00
John Kessenich
6fa17641b5 HLSL: Emit the OpSource HLSL instruction for HLSL, using new headers. 2017-04-07 15:40:01 -06:00
steve-lunarg
e741249b72 HLSL: pass tessellation execution modes through to SPIR-V
The SPIR-V generator had assumed tessellation modes such as
primitive type and vertex order would only appear in tess eval
(domain) shaders.  SPIR-V allows either, and HLSL allows and
possibly requires them to be in the hull shader.

This change:

1. Passes them through for either tessellation stage, and,

2. Does not set up defaults in the domain stage for HLSl compilation,
to avoid conflicting definitions.
2017-03-31 11:47:18 -06:00
steve-lunarg
e752f463c5 HLSL: HS return is arrayed to match SPIR-V semantics
HLSL HS outputs a per ctrl point value, and the DS reads an array
of that type.  (It also has a per patch frequency).  The per-ctrl-pt
frequency is arrayed on just one side, as opposed to SPIR-V which
is arrayed on both.  To match semantics, the compiler creates an
array behind the scenes and indexes it by invocation ID, assigning
the HS return value to it.
2017-03-30 14:37:08 -06:00
steve-lunarg
194f0f39ec HLSL: require tessellation factors to be fixed size arrays
SPIR-V requires that tessellation factor arrays be size 4 (outer) or 2 (inner).
HLSL allows other sizes such as 3, or even scalars.  This commit converts
between them by forcing the IO types to be the SPIR-V size, and allowing
copies between the internal and IO types to handle these cases.
2017-03-30 14:37:02 -06:00
steve-lunarg
9cee73e028 HLSL: support per control point patch const fn invocation
This PR emulates per control point inputs to patch constant functions.
Without either an extension to look across SIMD lanes or a dedicated
stage, the emulation must use separate invocations of the wrapped
entry point to obtain the per control point values.  This is provided
since shaders are wanting this functionality now, but such an extension
is not yet available.

Entry point arguments qualified as an invocation ID are replaced by the
current control point number when calling the wrapped entry point.  There
is no particular optimization for the case of the entry point not having
such an input but the PCF still accepting ctrl pt frequency data.  It'll
work, but anyway makes no so much sense.

The wrapped entry point must return the per control point data by value.
At this time it is not supported as an output parameter.
2017-03-30 14:36:56 -06:00