17 Commits

Author SHA1 Message Date
Jeremy Hayes
78221d619e Update CHANGES for release 11.12.0 2022-10-13 10:58:53 -06:00
Jeremy Hayes
6d5b40f051 Generate separate stores for partially swizzled memory stores
Full vector and fully specified vector swizzle stores are not affected by this change, only partial swizzles ie swizzles with fewer components than the vector being stored to.

Previously the vector being stored to loaded and any components not specified in the swizzle were used to create a full store to the vector.

While this change generates more SPIR-V instructions, it is necessary for correctness.

Fixes #2518.
2021-07-28 14:55:45 -06:00
Graeme Leese
182ab460d9 Update test expected files with new magic number
Updating the SPIR-V generator version number changes the output of all
the SPIR-V tests.
2020-06-22 11:49:38 +01:00
John Kessenich
3641ff7378 Bump code gen version, due to removal of OpEntryPoint operands. 2020-06-10 07:40:56 -06:00
John Kessenich
31c3370d83 Bump up the generator version, which is exposed in SPV test results. 2019-11-02 21:26:40 -06:00
David Neto
c4d5ac6bfa Update SPIRV-Tools known good: relax Uconvert check
Permit UConvert as an OpSpecConstantOp operation when
SPV_AMD_gpu_shader_int_16 is used.
2019-01-09 10:32:32 -05:00
David Neto
082184bcc9 Mark spv.int16.amd.frag.out as failing validation
See #1642

Also updates SPIRV-Tools and SPIRV-Headers known_good.
2019-01-03 14:36:20 -05:00
Jeff Bolz
0a93cfbb79 Update to newest SPIRV-Tools. It checks the Vulkan rule that all resources must have a set and binding decoration, which many tests fail. So add code to set a default value of zero. Also disable PCH for Ninja builds. 2018-12-11 20:58:29 -06:00
Alan Baker
ed777b0fbd Modify testing to only record validation pass/fail
* Changed unit tests to only record known the validation pass/fail
status
 * errors are output as part of the failure message if the result is
 unexpected
 * can turn off validation for each test individually
* Moved some SPV_KHR_vulkan_memory_model tests to be compiled for Vulkan
1.1
2018-12-07 13:58:46 -05:00
Grigory Dzhavadyan
4c9876b34c Add names for composite constants in SPIR-V
Consider the following code:

    layout(constant_id=0) const int Y = 1;
    layout(constant_id=1) const int Z = 2;
    layout(constant_id=3) const int X = Y + Z;

Previously, it would produce SPIR-V decorations like this:

    Decorate 21(Y) SpecId 1
    Decorate 22 SpecId 3
    Decorate 33(Z) SpecId 0

This seems inaccurate, since the spec constant `X` that is dependent on
the two others did not get a name in the SPIR-V decorations. This behavior
may potentially negatively affect shader introspection capabilities.

This change alters the behavior to always add a name, which results in the code
above producing the following decorations:

    Decorate 21(Y) SpecId 1
    Decorate 22(X) SpecId 3
    Decorate 33(Z) SpecId 0
2018-11-02 00:45:12 -07:00
John Kessenich
afe0c66f65 SPV: Fix #1487: Only declare AMD int16/half_float extensions when needed. 2018-09-10 18:10:51 -06:00
John Kessenich
cc14f2d329 SPV: Add SPIRV-Tools validator. This needs the latest SPIR-Tools. 2018-08-23 13:46:48 -06:00
John Kessenich
ad7645f4f5 Fix #1360: uint->int width conversions must still be typed as uint. 2018-06-04 20:09:30 -06:00
John Kessenich
d6c975572e Change the major revision number for next commit. 2018-06-04 15:33:31 -06:00
Jeff Bolz
af7a94876c Add bit width of types to disassembleInstruction 2018-05-24 21:08:20 -05:00
John Kessenich
ac3707921e Revert the commits that change OpArrayLength type and bumped the version number.
Now, version 5.* is all connected to making the uint type, which doesn't quite work.
Generator versions 4 and 6 do not do this.
2018-03-07 11:48:25 -07:00
John Kessenich
66011cb2c2 SPV: Implement Vulkan 1.1 features and extensions. 2018-03-06 16:12:04 -07:00