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24 Commits

Author SHA1 Message Date
Jeremy Hayes
78221d619e Update CHANGES for release 11.12.0 2022-10-13 10:58:53 -06:00
Greg Fischer
3d03b7822e
Scalarize vector readFirstInvocationARB (#2766) 
Fixes #2761
 2021-09-23 10:40:43 -06:00
Jeremy Hayes
6d5b40f051 Generate separate stores for partially swizzled memory stores 
Full vector and fully specified vector swizzle stores are not affected by this change, only partial swizzles ie swizzles with fewer components than the vector being stored to.

Previously the vector being stored to loaded and any components not specified in the swizzle were used to create a full store to the vector.

While this change generates more SPIR-V instructions, it is necessary for correctness.

Fixes #2518.
 2021-07-28 14:55:45 -06:00
Graeme Leese
182ab460d9 Update test expected files with new magic number 
Updating the SPIR-V generator version number changes the output of all
the SPIR-V tests.
 2020-06-22 11:49:38 +01:00
John Kessenich
3641ff7378 Bump code gen version, due to removal of OpEntryPoint operands. 2020-06-10 07:40:56 -06:00
John Kessenich
31c3370d83 Bump up the generator version, which is exposed in SPV test results. 2019-11-02 21:26:40 -06:00
John Kessenich
9c14f77f5d AST/SPV: Fix #930: translate uvec4 <-> uint64 for SubgroupGeMask et. al. 
On reading built-in variables SubgroupEqMask, SubgroupGeMask, SubgroupGtMask,
SubgroupLeMask, and SubgroupLtMask, the AST expects 64-bit ints, while SPIR-V
is defined as vectors of 32-bit ints.

The declaration type has to be translated in the opposite direction.
 2019-06-18 00:36:17 -06:00
Alan Baker
e86cc18e8c Update test expectations for new SPIRV-Tools 2019-06-13 08:54:31 -04:00
John Kessenich
d6c975572e Change the major revision number for next commit. 2018-06-04 15:33:31 -06:00
Jeff Bolz
af7a94876c Add bit width of types to disassembleInstruction 2018-05-24 21:08:20 -05:00
John Kessenich
ac3707921e Revert the commits that change OpArrayLength type and bumped the version number. 
Now, version 5.* is all connected to making the uint type, which doesn't quite work.
Generator versions 4 and 6 do not do this.
 2018-03-07 11:48:25 -07:00
John Kessenich
0216f24f0e SPV: Bump up the generator number. 2018-03-03 11:47:07 -07:00
John Kessenich
71b5da60d0 SPV: Bump up generator number, because previous commit changes code gen slightly. 2018-02-06 08:06:36 -07:00
John Kessenich
2b5ea9f851 SPV Version: Emit the requested SPIR-V version, not the header version. 
Fixes #1236.
 2018-01-31 18:41:59 -07:00
John Kessenich
6c1c2766b6 SPV: Bump SPIR-V header to the unified1 version (version 1.2). 2018-01-29 16:16:11 -07:00
John Kessenich
c72e5937dd SPV: Bump the generator number to account for barrier changes. 2017-12-16 00:34:08 -07:00
John Kessenich
07ed11f9a0 SPV: GeneratorVersion: bump version number because of atomic decrement change. 2017-10-07 11:41:20 -06:00
John Kessenich
e00e8f45a6 GLSL: replace general missing functionality with specific messages. 2017-06-05 16:42:33 -06:00
chaoc
f200da8631 Modify shader ballot extension by adding OpSubgroupReadInvocationKHR 2016-12-21 12:08:09 -08:00
John Kessenich
fb06e9552e Don't print the "Linked stage" message unless the AST is being dumped. 2016-12-03 13:59:51 -07:00
Rex Xu
b707205b0d SPV: OpGroupBroadcast is unable to handle vector operand. 2016-09-26 15:53:40 +08:00
Rex Xu
5159664475 SPV: Implement the extension SPV_KHR_shader_ballot 2016-09-22 16:05:07 +08:00
John Kessenich
c8a5676025 Merge branch 'feature' of https://github.com/amdrexu/glslang into amdrexu-feature 2016-05-05 12:04:22 -06:00
Rex Xu
574ab04caa Implement the extension GL_ARB_shader_ballot 
Add new built-in variables and functions to the parser (SPIR-V tokens are missing).
 2016-05-05 19:02:35 +08:00