9 Commits

Author SHA1 Message Date
Chow
8111268575
Add Shared/Std140 SSBO process & top-level array elements related (#2231)
* Add Shared/Std140 SSBO process & top-level array elements related
process

1.Add process options for shared/std140 ssbo, following ubo process
2.Add IO Variables reflection option, would keep all input/output
variables in reflection
3.Add Top-level related process, fix top-level array size issues,
following spec
4.Split ssbo/ubo reflection options, merge blowup expanding all into
function blowupActiveAggregate to allow other functions keep same entry
format.

Add options in StandAlone and test symbols.

1. Add options in StandAlone for std140/shared ubo/ssbo and all io variables reflection.
2. Add test for ssbo. When EShReflectionSharedStd140SSBO turns on, generated symbol and output would be different, to remind the difference. Defaultly disabled and nothing would change, nor blocking normal test.

* Add options in runtest script, refresh test results.

Add options in StandAlone:
--reflect-all-io-variables --reflect-shared-std140-ubo --reflect-shared-std140-ssbo

refresh test results.
Now the index, size of unsized array are expected.
2020-06-04 01:47:18 -06:00
baldurk
879562b766 Fix treatment of array input/output variables in reflection
* Non-block arrays should not be ignored when exploding types.
* When not exploding, set the array size correctly on each item.
2019-02-11 16:39:12 +00:00
baldurk
a972e73ad7 Add option to reflect all block members, inactive or active.
* The stages mask is more fine-grained, and each variable or block's mask
  indicates which stages it's active in.
2019-02-04 12:02:59 +00:00
baldurk
657acc0c40 Add option to reflect buffer blocks & variables separately to uniforms
* Also note the uniform indices of atomic counter buffers
2019-02-04 12:02:59 +00:00
baldurk
4a2aa82236 Reflect array stride, top-level array stride, and block member count 2019-02-04 12:02:59 +00:00
baldurk
0af5e3e346 Reflect pipeline outputs as well as inputs, optionally from other stages
* We add an option to reflect inputs from other stages than vertex, if only a
  later subset of the stages is linked into the program.
2019-02-04 12:02:59 +00:00
dmpakas
f556e5da26 Reflection exposes the Shader Stages where a Uniform is present 2018-07-10 18:25:48 +03:00
steve-lunarg
7b1dcd6693 HLSL: add readonly qualifier to tbuffer, so they end up as SRV 2017-04-20 13:23:01 -06:00
steve-lunarg
be28355019 WIP: HLSL: hlsl register class iomapping
Adds --hlsl-iomap option to perform IO mapping in HLSL register space.

--shift-cbuffer-binding is now a synonym for --shift-ubo-binding.

The idea way to do this seems to be passing in a dedicated IO resolver, but
that would require more intrusive restructuring, so maybe best for its
own PR.

The TDefaultHlslIoResolver class and the former TDefaultIoResolver class
share quite a bit of mechanism in a common base class.

TODO: tbuffers are landing in the wrong register class, which needs some
investigation.  They're either wrong upstream, or the detection in the
resolver is wrong.
2017-04-20 12:41:39 -06:00