0af5e3e346
* We add an option to reflect inputs from other stages than vertex, if only a later subset of the stages is linked into the program.
23 lines
1010 B
Plaintext
23 lines
1010 B
Plaintext
hlsl.reflection.binding.frag
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Uniform reflection:
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t1: offset -1, type 8b5d, size 1, index -1, binding 15, stages 16
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s1: offset -1, type 0, size 1, index -1, binding 5, stages 16
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t1a: offset -1, type 8b5d, size 1, index -1, binding 16, stages 16
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s1a: offset -1, type 0, size 1, index -1, binding 6, stages 16
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c1_a: offset 0, type 8b52, size 1, index 0, binding -1, stages 16
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c1_b: offset 16, type 1404, size 1, index 0, binding -1, stages 16
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c1_c: offset 20, type 1406, size 1, index 0, binding -1, stages 16
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c2_a: offset 0, type 8b52, size 1, index 1, binding -1, stages 16
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c2_b: offset 16, type 1404, size 1, index 1, binding -1, stages 16
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c2_c: offset 20, type 1406, size 1, index 1, binding -1, stages 16
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Uniform block reflection:
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cbuff1: offset -1, type ffffffff, size 24, index -1, binding 2, stages 0
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cbuff2: offset -1, type ffffffff, size 24, index -1, binding 3, stages 0
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Pipeline input reflection:
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Pipeline output reflection:
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psout.Color: offset 0, type 8b52, size 0, index 0, binding -1, stages 0
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