266 lines
9.3 KiB
C++
266 lines
9.3 KiB
C++
//
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// Copyright (C) 2016-2018 Google, Inc.
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//
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following
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// disclaimer in the documentation and/or other materials provided
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// with the distribution.
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//
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// Neither the name of 3Dlabs Inc. Ltd. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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// COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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// BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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// LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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// ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// Post-processing for SPIR-V IR, in internal form, not standard binary form.
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//
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#include <cassert>
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#include <cstdlib>
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#include <unordered_set>
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#include <algorithm>
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#include "SpvBuilder.h"
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#include "spirv.hpp"
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#include "GlslangToSpv.h"
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#include "SpvBuilder.h"
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namespace spv {
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#include "GLSL.std.450.h"
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#include "GLSL.ext.KHR.h"
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#include "GLSL.ext.EXT.h"
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#ifdef AMD_EXTENSIONS
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#include "GLSL.ext.AMD.h"
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#endif
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#ifdef NV_EXTENSIONS
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#include "GLSL.ext.NV.h"
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#endif
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}
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namespace spv {
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// Hook to visit each operand type and result type of an instruction.
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// Will be called multiple times for one instruction, once for each typed
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// operand and the result.
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void Builder::postProcessType(const Instruction& inst, Id typeId)
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{
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// Characterize the type being questioned
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Id basicTypeOp = getMostBasicTypeClass(typeId);
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int width = 0;
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if (basicTypeOp == OpTypeFloat || basicTypeOp == OpTypeInt)
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width = getScalarTypeWidth(typeId);
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// Do opcode-specific checks
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switch (inst.getOpCode()) {
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case OpLoad:
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case OpStore:
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if (basicTypeOp == OpTypeStruct) {
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if (containsType(typeId, OpTypeInt, 8))
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addCapability(CapabilityInt8);
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if (containsType(typeId, OpTypeInt, 16))
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addCapability(CapabilityInt16);
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if (containsType(typeId, OpTypeFloat, 16))
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addCapability(CapabilityFloat16);
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} else {
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StorageClass storageClass = getStorageClass(inst.getIdOperand(0));
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if (width == 8) {
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switch (storageClass) {
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case StorageClassUniform:
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case StorageClassStorageBuffer:
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case StorageClassPushConstant:
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break;
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default:
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addCapability(CapabilityInt8);
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break;
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}
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} else if (width == 16) {
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switch (storageClass) {
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case StorageClassUniform:
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case StorageClassStorageBuffer:
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case StorageClassPushConstant:
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case StorageClassInput:
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case StorageClassOutput:
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break;
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default:
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if (basicTypeOp == OpTypeInt)
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addCapability(CapabilityInt16);
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if (basicTypeOp == OpTypeFloat)
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addCapability(CapabilityFloat16);
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break;
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}
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}
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}
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break;
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case OpAccessChain:
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case OpPtrAccessChain:
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case OpCopyObject:
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case OpFConvert:
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case OpSConvert:
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case OpUConvert:
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break;
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case OpExtInst:
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#if AMD_EXTENSIONS
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switch (inst.getImmediateOperand(1)) {
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case GLSLstd450Frexp:
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case GLSLstd450FrexpStruct:
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if (getSpvVersion() < glslang::EShTargetSpv_1_3 && containsType(typeId, OpTypeInt, 16))
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addExtension(spv::E_SPV_AMD_gpu_shader_int16);
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break;
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case GLSLstd450InterpolateAtCentroid:
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case GLSLstd450InterpolateAtSample:
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case GLSLstd450InterpolateAtOffset:
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if (getSpvVersion() < glslang::EShTargetSpv_1_3 && containsType(typeId, OpTypeFloat, 16))
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addExtension(spv::E_SPV_AMD_gpu_shader_half_float);
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break;
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default:
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break;
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}
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#endif
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break;
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default:
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if (basicTypeOp == OpTypeFloat && width == 16)
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addCapability(CapabilityFloat16);
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if (basicTypeOp == OpTypeInt && width == 16)
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addCapability(CapabilityInt16);
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if (basicTypeOp == OpTypeInt && width == 8)
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addCapability(CapabilityInt8);
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break;
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}
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}
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// Called for each instruction that resides in a block.
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void Builder::postProcess(const Instruction& inst)
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{
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// Add capabilities based simply on the opcode.
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switch (inst.getOpCode()) {
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case OpExtInst:
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switch (inst.getImmediateOperand(1)) {
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case GLSLstd450InterpolateAtCentroid:
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case GLSLstd450InterpolateAtSample:
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case GLSLstd450InterpolateAtOffset:
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addCapability(CapabilityInterpolationFunction);
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break;
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default:
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break;
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}
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break;
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case OpDPdxFine:
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case OpDPdyFine:
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case OpFwidthFine:
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case OpDPdxCoarse:
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case OpDPdyCoarse:
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case OpFwidthCoarse:
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addCapability(CapabilityDerivativeControl);
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break;
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case OpImageQueryLod:
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case OpImageQuerySize:
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case OpImageQuerySizeLod:
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case OpImageQuerySamples:
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case OpImageQueryLevels:
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addCapability(CapabilityImageQuery);
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break;
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#ifdef NV_EXTENSIONS
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case OpGroupNonUniformPartitionNV:
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addExtension(E_SPV_NV_shader_subgroup_partitioned);
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addCapability(CapabilityGroupNonUniformPartitionedNV);
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break;
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#endif
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default:
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break;
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}
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// Checks based on type
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if (inst.getTypeId() != NoType)
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postProcessType(inst, inst.getTypeId());
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for (int op = 0; op < inst.getNumOperands(); ++op) {
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if (inst.isIdOperand(op)) {
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// In blocks, these are always result ids, but we are relying on
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// getTypeId() to return NoType for things like OpLabel.
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if (getTypeId(inst.getIdOperand(op)) != NoType)
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postProcessType(inst, getTypeId(inst.getIdOperand(op)));
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}
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}
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}
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// Called for each instruction in a reachable block.
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void Builder::postProcessReachable(const Instruction&)
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{
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// did have code here, but questionable to do so without deleting the instructions
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}
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// comment in header
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void Builder::postProcess()
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{
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std::unordered_set<const Block*> reachableBlocks;
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std::unordered_set<Id> unreachableDefinitions;
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// Collect IDs defined in unreachable blocks. For each function, label the
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// reachable blocks first. Then for each unreachable block, collect the
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// result IDs of the instructions in it.
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for (auto fi = module.getFunctions().cbegin(); fi != module.getFunctions().cend(); fi++) {
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Function* f = *fi;
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Block* entry = f->getEntryBlock();
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inReadableOrder(entry, [&reachableBlocks](const Block* b) { reachableBlocks.insert(b); });
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for (auto bi = f->getBlocks().cbegin(); bi != f->getBlocks().cend(); bi++) {
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Block* b = *bi;
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if (reachableBlocks.count(b) == 0) {
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for (auto ii = b->getInstructions().cbegin(); ii != b->getInstructions().cend(); ii++)
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unreachableDefinitions.insert(ii->get()->getResultId());
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}
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}
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}
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// Remove unneeded decorations, for unreachable instructions
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decorations.erase(std::remove_if(decorations.begin(), decorations.end(),
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[&unreachableDefinitions](std::unique_ptr<Instruction>& I) -> bool {
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Id decoration_id = I.get()->getIdOperand(0);
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return unreachableDefinitions.count(decoration_id) != 0;
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}),
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decorations.end());
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// Add per-instruction capabilities, extensions, etc.,
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// process all reachable instructions...
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for (auto bi = reachableBlocks.cbegin(); bi != reachableBlocks.cend(); ++bi) {
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const Block* block = *bi;
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const auto function = [this](const std::unique_ptr<Instruction>& inst) { postProcessReachable(*inst.get()); };
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std::for_each(block->getInstructions().begin(), block->getInstructions().end(), function);
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}
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// process all block-contained instructions
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for (auto fi = module.getFunctions().cbegin(); fi != module.getFunctions().cend(); fi++) {
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Function* f = *fi;
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for (auto bi = f->getBlocks().cbegin(); bi != f->getBlocks().cend(); bi++) {
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Block* b = *bi;
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for (auto ii = b->getInstructions().cbegin(); ii != b->getInstructions().cend(); ii++)
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postProcess(*ii->get());
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}
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}
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}
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}; // end spv namespace
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