3ebb72cc74
Zero is not a valid ID value and the SPIR-V emitter library should never be emitting instructions with ID values of 0.
523 lines
17 KiB
C++
523 lines
17 KiB
C++
//
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// Copyright (C) 2014 LunarG, Inc.
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// Copyright (C) 2015-2018 Google, Inc.
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//
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following
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// disclaimer in the documentation and/or other materials provided
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// with the distribution.
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//
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// Neither the name of 3Dlabs Inc. Ltd. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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// COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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// BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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// LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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// ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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// SPIRV-IR
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//
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// Simple in-memory representation (IR) of SPIRV. Just for holding
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// Each function's CFG of blocks. Has this hierarchy:
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// - Module, which is a list of
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// - Function, which is a list of
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// - Block, which is a list of
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// - Instruction
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//
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#pragma once
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#ifndef spvIR_H
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#define spvIR_H
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#include "spirv.hpp"
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#include <algorithm>
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#include <cassert>
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#include <functional>
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#include <iostream>
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#include <memory>
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#include <vector>
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#include <set>
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namespace spv {
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class Block;
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class Function;
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class Module;
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const Id NoResult = 0;
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const Id NoType = 0;
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const Decoration NoPrecision = DecorationMax;
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#ifdef __GNUC__
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# define POTENTIALLY_UNUSED __attribute__((unused))
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#else
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# define POTENTIALLY_UNUSED
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#endif
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POTENTIALLY_UNUSED
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const MemorySemanticsMask MemorySemanticsAllMemory =
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(MemorySemanticsMask)(MemorySemanticsUniformMemoryMask |
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MemorySemanticsWorkgroupMemoryMask |
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MemorySemanticsAtomicCounterMemoryMask |
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MemorySemanticsImageMemoryMask);
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struct IdImmediate {
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bool isId; // true if word is an Id, false if word is an immediate
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unsigned word;
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IdImmediate(bool i, unsigned w) : isId(i), word(w) {}
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};
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//
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// SPIR-V IR instruction.
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//
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class Instruction {
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public:
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Instruction(Id resultId, Id typeId, Op opCode) : resultId(resultId), typeId(typeId), opCode(opCode), block(nullptr) { }
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explicit Instruction(Op opCode) : resultId(NoResult), typeId(NoType), opCode(opCode), block(nullptr) { }
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virtual ~Instruction() {}
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void addIdOperand(Id id) {
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// ids can't be 0
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assert(id);
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operands.push_back(id);
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idOperand.push_back(true);
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}
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void addImmediateOperand(unsigned int immediate) {
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operands.push_back(immediate);
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idOperand.push_back(false);
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}
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void setImmediateOperand(unsigned idx, unsigned int immediate) {
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assert(!idOperand[idx]);
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operands[idx] = immediate;
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}
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void addStringOperand(const char* str)
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{
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unsigned int word = 0;
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unsigned int shiftAmount = 0;
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char c;
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do {
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c = *(str++);
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word |= ((unsigned int)c) << shiftAmount;
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shiftAmount += 8;
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if (shiftAmount == 32) {
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addImmediateOperand(word);
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word = 0;
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shiftAmount = 0;
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}
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} while (c != 0);
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// deal with partial last word
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if (shiftAmount > 0) {
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addImmediateOperand(word);
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}
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}
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bool isIdOperand(int op) const { return idOperand[op]; }
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void setBlock(Block* b) { block = b; }
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Block* getBlock() const { return block; }
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Op getOpCode() const { return opCode; }
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int getNumOperands() const
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{
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assert(operands.size() == idOperand.size());
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return (int)operands.size();
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}
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Id getResultId() const { return resultId; }
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Id getTypeId() const { return typeId; }
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Id getIdOperand(int op) const {
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assert(idOperand[op]);
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return operands[op];
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}
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unsigned int getImmediateOperand(int op) const {
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assert(!idOperand[op]);
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return operands[op];
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}
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// Write out the binary form.
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void dump(std::vector<unsigned int>& out) const
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{
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// Compute the wordCount
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unsigned int wordCount = 1;
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if (typeId)
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++wordCount;
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if (resultId)
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++wordCount;
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wordCount += (unsigned int)operands.size();
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// Write out the beginning of the instruction
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out.push_back(((wordCount) << WordCountShift) | opCode);
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if (typeId)
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out.push_back(typeId);
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if (resultId)
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out.push_back(resultId);
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// Write out the operands
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for (int op = 0; op < (int)operands.size(); ++op)
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out.push_back(operands[op]);
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}
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protected:
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Instruction(const Instruction&);
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Id resultId;
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Id typeId;
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Op opCode;
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std::vector<Id> operands; // operands, both <id> and immediates (both are unsigned int)
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std::vector<bool> idOperand; // true for operands that are <id>, false for immediates
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Block* block;
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};
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//
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// SPIR-V IR block.
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//
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class Block {
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public:
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Block(Id id, Function& parent);
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virtual ~Block()
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{
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}
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Id getId() { return instructions.front()->getResultId(); }
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Function& getParent() const { return parent; }
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void addInstruction(std::unique_ptr<Instruction> inst);
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void addPredecessor(Block* pred) { predecessors.push_back(pred); pred->successors.push_back(this);}
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void addLocalVariable(std::unique_ptr<Instruction> inst) { localVariables.push_back(std::move(inst)); }
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const std::vector<Block*>& getPredecessors() const { return predecessors; }
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const std::vector<Block*>& getSuccessors() const { return successors; }
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const std::vector<std::unique_ptr<Instruction> >& getInstructions() const {
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return instructions;
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}
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const std::vector<std::unique_ptr<Instruction> >& getLocalVariables() const { return localVariables; }
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void setUnreachable() { unreachable = true; }
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bool isUnreachable() const { return unreachable; }
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// Returns the block's merge instruction, if one exists (otherwise null).
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const Instruction* getMergeInstruction() const {
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if (instructions.size() < 2) return nullptr;
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const Instruction* nextToLast = (instructions.cend() - 2)->get();
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switch (nextToLast->getOpCode()) {
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case OpSelectionMerge:
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case OpLoopMerge:
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return nextToLast;
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default:
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return nullptr;
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}
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return nullptr;
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}
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// Change this block into a canonical dead merge block. Delete instructions
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// as necessary. A canonical dead merge block has only an OpLabel and an
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// OpUnreachable.
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void rewriteAsCanonicalUnreachableMerge() {
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assert(localVariables.empty());
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// Delete all instructions except for the label.
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assert(instructions.size() > 0);
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instructions.resize(1);
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successors.clear();
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addInstruction(std::unique_ptr<Instruction>(new Instruction(OpUnreachable)));
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}
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// Change this block into a canonical dead continue target branching to the
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// given header ID. Delete instructions as necessary. A canonical dead continue
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// target has only an OpLabel and an unconditional branch back to the corresponding
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// header.
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void rewriteAsCanonicalUnreachableContinue(Block* header) {
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assert(localVariables.empty());
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// Delete all instructions except for the label.
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assert(instructions.size() > 0);
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instructions.resize(1);
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successors.clear();
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// Add OpBranch back to the header.
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assert(header != nullptr);
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Instruction* branch = new Instruction(OpBranch);
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branch->addIdOperand(header->getId());
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addInstruction(std::unique_ptr<Instruction>(branch));
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successors.push_back(header);
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}
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bool isTerminated() const
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{
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switch (instructions.back()->getOpCode()) {
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case OpBranch:
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case OpBranchConditional:
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case OpSwitch:
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case OpKill:
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case OpTerminateInvocation:
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case OpReturn:
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case OpReturnValue:
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case OpUnreachable:
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return true;
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default:
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return false;
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}
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}
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void dump(std::vector<unsigned int>& out) const
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{
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instructions[0]->dump(out);
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for (int i = 0; i < (int)localVariables.size(); ++i)
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localVariables[i]->dump(out);
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for (int i = 1; i < (int)instructions.size(); ++i)
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instructions[i]->dump(out);
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}
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protected:
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Block(const Block&);
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Block& operator=(Block&);
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// To enforce keeping parent and ownership in sync:
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friend Function;
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std::vector<std::unique_ptr<Instruction> > instructions;
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std::vector<Block*> predecessors, successors;
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std::vector<std::unique_ptr<Instruction> > localVariables;
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Function& parent;
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// track whether this block is known to be uncreachable (not necessarily
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// true for all unreachable blocks, but should be set at least
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// for the extraneous ones introduced by the builder).
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bool unreachable;
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};
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// The different reasons for reaching a block in the inReadableOrder traversal.
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enum ReachReason {
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// Reachable from the entry block via transfers of control, i.e. branches.
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ReachViaControlFlow = 0,
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// A continue target that is not reachable via control flow.
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ReachDeadContinue,
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// A merge block that is not reachable via control flow.
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ReachDeadMerge
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};
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// Traverses the control-flow graph rooted at root in an order suited for
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// readable code generation. Invokes callback at every node in the traversal
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// order. The callback arguments are:
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// - the block,
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// - the reason we reached the block,
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// - if the reason was that block is an unreachable continue or unreachable merge block
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// then the last parameter is the corresponding header block.
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void inReadableOrder(Block* root, std::function<void(Block*, ReachReason, Block* header)> callback);
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//
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// SPIR-V IR Function.
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//
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class Function {
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public:
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Function(Id id, Id resultType, Id functionType, Id firstParam, Module& parent);
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virtual ~Function()
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{
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for (int i = 0; i < (int)parameterInstructions.size(); ++i)
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delete parameterInstructions[i];
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for (int i = 0; i < (int)blocks.size(); ++i)
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delete blocks[i];
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}
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Id getId() const { return functionInstruction.getResultId(); }
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Id getParamId(int p) const { return parameterInstructions[p]->getResultId(); }
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Id getParamType(int p) const { return parameterInstructions[p]->getTypeId(); }
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void addBlock(Block* block) { blocks.push_back(block); }
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void removeBlock(Block* block)
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{
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auto found = find(blocks.begin(), blocks.end(), block);
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assert(found != blocks.end());
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blocks.erase(found);
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delete block;
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}
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Module& getParent() const { return parent; }
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Block* getEntryBlock() const { return blocks.front(); }
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Block* getLastBlock() const { return blocks.back(); }
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const std::vector<Block*>& getBlocks() const { return blocks; }
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void addLocalVariable(std::unique_ptr<Instruction> inst);
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Id getReturnType() const { return functionInstruction.getTypeId(); }
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Id getFuncId() const { return functionInstruction.getResultId(); }
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void setReturnPrecision(Decoration precision)
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{
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if (precision == DecorationRelaxedPrecision)
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reducedPrecisionReturn = true;
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}
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Decoration getReturnPrecision() const
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{ return reducedPrecisionReturn ? DecorationRelaxedPrecision : NoPrecision; }
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void setDebugLineInfo(Id fileName, int line, int column) {
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lineInstruction = std::unique_ptr<Instruction>{new Instruction(OpLine)};
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lineInstruction->addIdOperand(fileName);
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lineInstruction->addImmediateOperand(line);
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lineInstruction->addImmediateOperand(column);
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}
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bool hasDebugLineInfo() const { return lineInstruction != nullptr; }
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void setImplicitThis() { implicitThis = true; }
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bool hasImplicitThis() const { return implicitThis; }
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void addParamPrecision(unsigned param, Decoration precision)
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{
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if (precision == DecorationRelaxedPrecision)
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reducedPrecisionParams.insert(param);
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}
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Decoration getParamPrecision(unsigned param) const
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{
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return reducedPrecisionParams.find(param) != reducedPrecisionParams.end() ?
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DecorationRelaxedPrecision : NoPrecision;
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}
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void dump(std::vector<unsigned int>& out) const
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{
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// OpLine
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if (lineInstruction != nullptr) {
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lineInstruction->dump(out);
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}
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// OpFunction
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functionInstruction.dump(out);
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// OpFunctionParameter
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for (int p = 0; p < (int)parameterInstructions.size(); ++p)
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parameterInstructions[p]->dump(out);
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// Blocks
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inReadableOrder(blocks[0], [&out](const Block* b, ReachReason, Block*) { b->dump(out); });
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Instruction end(0, 0, OpFunctionEnd);
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end.dump(out);
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}
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protected:
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Function(const Function&);
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Function& operator=(Function&);
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Module& parent;
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std::unique_ptr<Instruction> lineInstruction;
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Instruction functionInstruction;
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std::vector<Instruction*> parameterInstructions;
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std::vector<Block*> blocks;
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bool implicitThis; // true if this is a member function expecting to be passed a 'this' as the first argument
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bool reducedPrecisionReturn;
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std::set<int> reducedPrecisionParams; // list of parameter indexes that need a relaxed precision arg
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};
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//
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// SPIR-V IR Module.
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//
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class Module {
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public:
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Module() {}
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virtual ~Module()
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{
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// TODO delete things
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}
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void addFunction(Function *fun) { functions.push_back(fun); }
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void mapInstruction(Instruction *instruction)
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{
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spv::Id resultId = instruction->getResultId();
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// map the instruction's result id
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if (resultId >= idToInstruction.size())
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idToInstruction.resize(resultId + 16);
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idToInstruction[resultId] = instruction;
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}
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Instruction* getInstruction(Id id) const { return idToInstruction[id]; }
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const std::vector<Function*>& getFunctions() const { return functions; }
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spv::Id getTypeId(Id resultId) const {
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return idToInstruction[resultId] == nullptr ? NoType : idToInstruction[resultId]->getTypeId();
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}
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StorageClass getStorageClass(Id typeId) const
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{
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assert(idToInstruction[typeId]->getOpCode() == spv::OpTypePointer);
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return (StorageClass)idToInstruction[typeId]->getImmediateOperand(0);
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}
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void dump(std::vector<unsigned int>& out) const
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{
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for (int f = 0; f < (int)functions.size(); ++f)
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functions[f]->dump(out);
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}
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protected:
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Module(const Module&);
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std::vector<Function*> functions;
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// map from result id to instruction having that result id
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std::vector<Instruction*> idToInstruction;
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// map from a result id to its type id
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};
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//
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// Implementation (it's here due to circular type definitions).
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//
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// Add both
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// - the OpFunction instruction
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// - all the OpFunctionParameter instructions
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__inline Function::Function(Id id, Id resultType, Id functionType, Id firstParamId, Module& parent)
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: parent(parent), lineInstruction(nullptr),
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functionInstruction(id, resultType, OpFunction), implicitThis(false),
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reducedPrecisionReturn(false)
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{
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// OpFunction
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functionInstruction.addImmediateOperand(FunctionControlMaskNone);
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functionInstruction.addIdOperand(functionType);
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parent.mapInstruction(&functionInstruction);
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parent.addFunction(this);
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// OpFunctionParameter
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Instruction* typeInst = parent.getInstruction(functionType);
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int numParams = typeInst->getNumOperands() - 1;
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for (int p = 0; p < numParams; ++p) {
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Instruction* param = new Instruction(firstParamId + p, typeInst->getIdOperand(p + 1), OpFunctionParameter);
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parent.mapInstruction(param);
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parameterInstructions.push_back(param);
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}
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}
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__inline void Function::addLocalVariable(std::unique_ptr<Instruction> inst)
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{
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Instruction* raw_instruction = inst.get();
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blocks[0]->addLocalVariable(std::move(inst));
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parent.mapInstruction(raw_instruction);
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}
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__inline Block::Block(Id id, Function& parent) : parent(parent), unreachable(false)
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{
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instructions.push_back(std::unique_ptr<Instruction>(new Instruction(id, NoType, OpLabel)));
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instructions.back()->setBlock(this);
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parent.getParent().mapInstruction(instructions.back().get());
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}
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__inline void Block::addInstruction(std::unique_ptr<Instruction> inst)
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{
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Instruction* raw_instruction = inst.get();
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instructions.push_back(std::move(inst));
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raw_instruction->setBlock(this);
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if (raw_instruction->getResultId())
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parent.getParent().mapInstruction(raw_instruction);
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}
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} // end spv namespace
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#endif // spvIR_H
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