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[libpng16] mips: Eliminate use of non-ISO-C90 features

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The MIPS MSA code contains // comments and the use of an "asm"
directive, neither of which are part of ISO-C90.  This removes the //
comments and converts asm to __asm__, which GCC allows.

The code compiles but maintenance is required; it's not clear it will
work on anything other than one specific compiler/isa combination.  It
should be rewritten using intrinsics, not assembler; as it stands it is
a security risk.

This is a cherry-pick of commit bd39ebbcfd64d785f907b5e8dd4055a97a34f2cf
from branch 'libpng18'.

Co-authored-by: Cosmin Truta <ctruta@gmail.com>
Reviewed-by: Chris Blume <ProgramMax@gmail.com>
Signed-off-by: John Bowler <jbowler@acm.org>
Signed-off-by: Cosmin Truta <ctruta@gmail.com>
This commit is contained in:
John Bowler 2024-09-22 18:41:12 -07:00 committed by Cosmin Truta
parent 65cd5fa3e5
commit 0a27b48e94
1 changed files with 22 additions and 22 deletions
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38
mips/filter_msa_intrinsics.c
View File

@ -47,7 +47,7 @@
uint8_t *psrc_lw_m = (uint8_t *) (psrc); \
uint32_t val_m; \
\
asm volatile ( \
__asm__ volatile ( \
"lw %[val_m], %[psrc_lw_m] \n\t" \
\
: [val_m] "=r" (val_m) \
@ -62,7 +62,7 @@
uint8_t *pdst_sh_m = (uint8_t *) (pdst); \
uint16_t val_m = (val); \
\
asm volatile ( \
__asm__ volatile ( \
"sh %[val_m], %[pdst_sh_m] \n\t" \
\
: [pdst_sh_m] "=m" (*pdst_sh_m) \
@ -75,7 +75,7 @@
uint8_t *pdst_sw_m = (uint8_t *) (pdst); \
uint32_t val_m = (val); \
\
asm volatile ( \
__asm__ volatile ( \
"sw %[val_m], %[pdst_sw_m] \n\t" \
\
: [pdst_sw_m] "=m" (*pdst_sw_m) \
@ -83,13 +83,13 @@
); \
}
#if (__mips == 64)
#if __mips == 64
#define SD(val, pdst) \
{ \
uint8_t *pdst_sd_m = (uint8_t *) (pdst); \
uint64_t val_m = (val); \
\
asm volatile ( \
__asm__ volatile ( \
"sd %[val_m], %[pdst_sd_m] \n\t" \
\
: [pdst_sd_m] "=m" (*pdst_sd_m) \
@ -108,17 +108,17 @@
SW(val0_m, pdst_sd_m); \
SW(val1_m, pdst_sd_m + 4); \
}
#endif
#endif /* __mips == 64 */
#else
#define MSA_SRLI_B(a, b) (a >> b)
#if (__mips_isa_rev >= 6)
#if __mips_isa_rev >= 6
#define LW(psrc) \
( { \
uint8_t *psrc_lw_m = (uint8_t *) (psrc); \
uint32_t val_m; \
\
asm volatile ( \
__asm__ volatile ( \
"lw %[val_m], %[psrc_lw_m] \n\t" \
\
: [val_m] "=r" (val_m) \
@ -133,7 +133,7 @@
uint8_t *pdst_sh_m = (uint8_t *) (pdst); \
uint16_t val_m = (val); \
\
asm volatile ( \
__asm__ volatile ( \
"sh %[val_m], %[pdst_sh_m] \n\t" \
\
: [pdst_sh_m] "=m" (*pdst_sh_m) \
@ -146,7 +146,7 @@
uint8_t *pdst_sw_m = (uint8_t *) (pdst); \
uint32_t val_m = (val); \
\
asm volatile ( \
__asm__ volatile ( \
"sw %[val_m], %[pdst_sw_m] \n\t" \
\
: [pdst_sw_m] "=m" (*pdst_sw_m) \
@ -154,13 +154,13 @@
); \
}
#if (__mips == 64)
#if __mips == 64
#define SD(val, pdst) \
{ \
uint8_t *pdst_sd_m = (uint8_t *) (pdst); \
uint64_t val_m = (val); \
\
asm volatile ( \
__asm__ volatile ( \
"sd %[val_m], %[pdst_sd_m] \n\t" \
\
: [pdst_sd_m] "=m" (*pdst_sd_m) \
@ -179,14 +179,14 @@
SW(val0_m, pdst_sd_m); \
SW(val1_m, pdst_sd_m + 4); \
}
#endif
#else // !(__mips_isa_rev >= 6)
#endif /* __mips == 64 */
#else
#define LW(psrc) \
( { \
uint8_t *psrc_lw_m = (uint8_t *) (psrc); \
uint32_t val_m; \
\
asm volatile ( \
__asm__ volatile ( \
"ulw %[val_m], %[psrc_lw_m] \n\t" \
\
: [val_m] "=r" (val_m) \
@ -201,7 +201,7 @@
uint8_t *pdst_sh_m = (uint8_t *) (pdst); \
uint16_t val_m = (val); \
\
asm volatile ( \
__asm__ volatile ( \
"ush %[val_m], %[pdst_sh_m] \n\t" \
\
: [pdst_sh_m] "=m" (*pdst_sh_m) \
@ -214,7 +214,7 @@
uint8_t *pdst_sw_m = (uint8_t *) (pdst); \
uint32_t val_m = (val); \
\
asm volatile ( \
__asm__ volatile ( \
"usw %[val_m], %[pdst_sw_m] \n\t" \
\
: [pdst_sw_m] "=m" (*pdst_sw_m) \
@ -238,14 +238,14 @@
{ \
uint8_t *pdst_m = (uint8_t *) (pdst); \
\
asm volatile ( \
__asm__ volatile ( \
"usw $0, %[pdst_m] \n\t" \
\
: [pdst_m] "=m" (*pdst_m) \
: \
); \
}
#endif // (__mips_isa_rev >= 6)
#endif /* __mips_isa_rev >= 6 */
#endif
#define LD_B(RTYPE, psrc) *((RTYPE *) (psrc))