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chore: Add riscv/.editorconfig and pacify editorconfig-checker

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Also tidy up the new RISC-V code to comply with our coding style,
and rearrange comments inside png.h to improve readability within
the configured editing limits.
This commit is contained in:
Cosmin Truta 2025-05-27 11:28:56 +03:00
parent 5be32eb35c
commit cff8620272
3 changed files with 54 additions and 23 deletions
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35
png.h
View File

@ -3303,30 +3303,45 @@ PNG_EXPORT(245, int, png_image_write_to_memory, (png_imagep image, void *memory,
* selected at run time.
*/
#ifdef PNG_SET_OPTION_SUPPORTED
/* HARDWARE: ARM Neon SIMD instructions supported */
#ifdef PNG_ARM_NEON_API_SUPPORTED
# define PNG_ARM_NEON 0 /* HARDWARE: ARM Neon SIMD instructions supported */
# define PNG_ARM_NEON 0
#endif
#define PNG_MAXIMUM_INFLATE_WINDOW 2 /* SOFTWARE: force maximum window */
#define PNG_SKIP_sRGB_CHECK_PROFILE 4 /* SOFTWARE: Check ICC profile for sRGB */
/* SOFTWARE: Force maximum window */
#define PNG_MAXIMUM_INFLATE_WINDOW 2
/* SOFTWARE: Check ICC profile for sRGB */
#define PNG_SKIP_sRGB_CHECK_PROFILE 4
/* HARDWARE: MIPS MSA SIMD instructions supported */
#ifdef PNG_MIPS_MSA_API_SUPPORTED
# define PNG_MIPS_MSA 6 /* HARDWARE: MIPS Msa SIMD instructions supported */
# define PNG_MIPS_MSA 6
#endif
/* SOFTWARE: Disable Adler32 check on IDAT */
#ifdef PNG_DISABLE_ADLER32_CHECK_SUPPORTED
# define PNG_IGNORE_ADLER32 8 /* SOFTWARE: disable Adler32 check on IDAT */
# define PNG_IGNORE_ADLER32 8
#endif
/* HARDWARE: PowerPC VSX SIMD instructions supported */
#ifdef PNG_POWERPC_VSX_API_SUPPORTED
# define PNG_POWERPC_VSX 10 /* HARDWARE: PowerPC VSX SIMD instructions
* supported */
# define PNG_POWERPC_VSX 10
#endif
/* HARDWARE: MIPS MMI SIMD instructions supported */
#ifdef PNG_MIPS_MMI_API_SUPPORTED
# define PNG_MIPS_MMI 12 /* HARDWARE: MIPS MMI SIMD instructions supported */
# define PNG_MIPS_MMI 12
#endif
/* HARDWARE: RISC-V RVV SIMD instructions supported */
#ifdef PNG_RISCV_RVV_API_SUPPORTED
# define PNG_RISCV_RVV 14 /* HARDWARE: RISC-V RVV SIMD instructions supported */
# define PNG_RISCV_RVV 14
#endif
#define PNG_OPTION_NEXT 16 /* Next option - numbers must be even */
/* Next option - numbers must be even */
#define PNG_OPTION_NEXT 16
/* Return values: NOTE: there are four values and 'off' is *not* zero */
#define PNG_OPTION_UNSET 0 /* Unset - defaults to off */

8
riscv/.editorconfig Normal file
View File

@ -0,0 +1,8 @@
# https://editorconfig.org
root = false
# FIXME
[*.[ch]]
max_doc_length = unset
max_line_length = unset

34
riscv/filter_rvv_intrinsics.c
View File

@ -24,7 +24,8 @@ png_read_filter_row_up_rvv(png_row_infop row_info, png_bytep row,
{
size_t len = row_info->rowbytes;
for (size_t vl; len > 0; len -= vl, row += vl, prev_row += vl) {
for (size_t vl; len > 0; len -= vl, row += vl, prev_row += vl)
{
vl = __riscv_vsetvl_e8m8(len);
vuint8m8_t prev_vals = __riscv_vle8_v_u8m8(prev_row, vl);
@ -56,8 +57,8 @@ png_read_filter_row_sub_rvv(size_t len, size_t bpp, unsigned char* row)
asm volatile ("vle8.v v0, (%0)" : : "r" (row));
row += bpp;
while (row < rp_end) {
while (row < rp_end)
{
/* x = *row */
asm volatile ("vle8.v v8, (%0)" : : "r" (row));
/* a = a + x */
@ -129,8 +130,8 @@ png_read_filter_row_avg_rvv(size_t len, size_t bpp, unsigned char* row,
/* remaining pixels */
while (row < rp_end) {
while (row < rp_end)
{
/* b = *prev_row */
asm volatile ("vle8.v v4, (%0)" : : "r" (prev_row));
prev_row += bpp;
@ -182,12 +183,14 @@ prefix_sum(vuint8m1_t chunk, unsigned char* carry, size_t vl,
{
size_t r;
for (r = 1; r < MIN_CHUNK_LEN; r <<= 1) {
for (r = 1; r < MIN_CHUNK_LEN; r <<= 1)
{
vbool8_t shift_mask = __riscv_vmsgeu_vx_u8m1_b8(__riscv_vid_v_u8m1(vl), r, vl);
chunk = __riscv_vadd_vv_u8m1_mu(shift_mask, chunk, chunk, __riscv_vslideup_vx_u8m1(__riscv_vundefined_u8m1(), chunk, r, vl), vl);
}
for (r = MIN_CHUNK_LEN; r < MAX_CHUNK_LEN && r < max_chunk_len; r <<= 1) {
for (r = MIN_CHUNK_LEN; r < MAX_CHUNK_LEN && r < max_chunk_len; r <<= 1)
{
vbool8_t shift_mask = __riscv_vmsgeu_vx_u8m1_b8(__riscv_vid_v_u8m1(vl), r, vl);
chunk = __riscv_vadd_vv_u8m1_mu(shift_mask, chunk, chunk, __riscv_vslideup_vx_u8m1(__riscv_vundefined_u8m1(), chunk, r, vl), vl);
}
@ -253,8 +256,8 @@ png_read_filter_row_paeth_rvv(size_t len, size_t bpp, unsigned char* row,
row += bpp;
/* remaining pixels */
while (row < rp_end) {
while (row < rp_end)
{
/* b = *prev_row */
asm volatile ("vle8.v v4, (%0)" : : "r" (prev));
prev += bpp;
@ -293,9 +296,11 @@ png_read_filter_row_paeth_rvv(size_t len, size_t bpp, unsigned char* row,
*/
/*
* if (pb < pa) {
* pa = pb;
* a = b; (see (*1))
* if (pb < pa)
* {
* pa = pb;
* a = b;
* // see (*1)
* }
*/
asm volatile ("vmslt.vv v0, v20, v16"); /* set mask[i] if pb[i] < pa[i] */
@ -303,7 +308,10 @@ png_read_filter_row_paeth_rvv(size_t len, size_t bpp, unsigned char* row,
/*
* if (pc < pa)
* a = c; (see (*2))
* {
* a = c;
* // see (*2)
* }
*/
asm volatile ("vmslt.vv v31, v24, v16"); /* set tmpmask[i] if pc[i] < pa[i] */