Fix #1360: uint->int width conversions must still be typed as uint.
This commit is contained in:
@@ -143,8 +143,8 @@ spv.int16.amd.frag
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205:198(i16vec2) ConstantComposite 203 203
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211: TypeVector 28(int) 2
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212: TypePointer Function 211(ivec2)
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224: TypeVector 18(int) 2
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225: TypePointer Function 224(ivec2)
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222: TypeVector 18(int) 2
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225: TypePointer Function 222(ivec2)
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237: TypeFloat 32
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238: TypeVector 237(float) 2
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239: TypePointer Function 238(fvec2)
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@@ -157,9 +157,9 @@ spv.int16.amd.frag
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273: TypeInt 64 1
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274: TypeVector 273(int64_t) 2
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275: TypePointer Function 274(i64vec2)
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287: TypeInt 64 0
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288: TypeVector 287(int64_t) 2
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289: TypePointer Function 288(i64vec2)
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285: TypeInt 64 0
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286: TypeVector 285(int64_t) 2
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289: TypePointer Function 286(i64vec2)
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316: 17(int16_t) Constant 4294967295
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317:187(i16vec2) ConstantComposite 316 316
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326: 49(i16vec3) ConstantComposite 202 202 202
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@@ -175,7 +175,7 @@ spv.int16.amd.frag
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407: TypePointer Function 261(float16_t)
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431: TypePointer Function 273(int64_t)
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434: TypeVector 17(int16_t) 4
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440: TypePointer Function 287(int64_t)
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440: TypePointer Function 285(int64_t)
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443: TypeVector 14(int16_t) 4
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449: TypePointer Function 388(bvec3)
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515(Block): TypeStruct 54(i16vec3) 14(int16_t)
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@@ -186,7 +186,7 @@ spv.int16.amd.frag
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520: TypePointer Input 17(int16_t)
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521(ii16): 520(ptr) Variable Input
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522(si64):273(int64_t) SpecConstant 4294967286 4294967295
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523(su64):287(int64_t) SpecConstant 20 0
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523(su64):285(int64_t) SpecConstant 20 0
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524(si): 28(int) SpecConstant 4294967291
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525(su): 18(int) SpecConstant 4
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526(sb): 125(bool) SpecConstantTrue
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@@ -197,7 +197,7 @@ spv.int16.amd.frag
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531: 17(int16_t) SpecConstantOp 169 526(sb) 53 194
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532: 14(int16_t) SpecConstantOp 169 526(sb) 203 202
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533: 28(int) SpecConstantOp 114 527(si16)
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534: 28(int) SpecConstantOp 113 528(su16)
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534: 18(int) SpecConstantOp 113 528(su16)
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535: 28(int) SpecConstantOp 128 534 128
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536: 17(int16_t) SpecConstantOp 114 524(si)
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537: 17(int16_t) SpecConstantOp 114 524(si)
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@@ -205,20 +205,20 @@ spv.int16.amd.frag
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539: 28(int) SpecConstantOp 114 527(si16)
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540: 18(int) SpecConstantOp 128 539 128
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541: 18(int) SpecConstantOp 113 528(su16)
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542: 17(int16_t) SpecConstantOp 113 525(su)
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542: 14(int16_t) SpecConstantOp 113 525(su)
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543: 17(int16_t) SpecConstantOp 128 542 202
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544: 14(int16_t) SpecConstantOp 113 525(su)
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545:273(int64_t) SpecConstantOp 114 527(si16)
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546:273(int64_t) SpecConstantOp 113 528(su16)
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547:287(int64_t) Constant 0 0
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546:285(int64_t) SpecConstantOp 113 528(su16)
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547:285(int64_t) Constant 0 0
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548:273(int64_t) SpecConstantOp 128 546 547
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549: 17(int16_t) SpecConstantOp 114 522(si64)
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550: 17(int16_t) SpecConstantOp 114 522(si64)
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551: 14(int16_t) SpecConstantOp 128 550 202
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552:273(int64_t) SpecConstantOp 114 527(si16)
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553:287(int64_t) SpecConstantOp 128 552 547
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554:287(int64_t) SpecConstantOp 113 528(su16)
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555: 17(int16_t) SpecConstantOp 113 523(su64)
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553:285(int64_t) SpecConstantOp 128 552 547
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554:285(int64_t) SpecConstantOp 113 528(su16)
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555: 14(int16_t) SpecConstantOp 113 523(su64)
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556: 17(int16_t) SpecConstantOp 128 555 202
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557: 14(int16_t) SpecConstantOp 113 523(su64)
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558: 14(int16_t) SpecConstantOp 128 527(si16) 202
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@@ -450,22 +450,22 @@ spv.int16.amd.frag
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220: 211(ivec2) SConvert 219
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Store 213(iv) 220
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221:198(i16vec2) Load 200(u16v)
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222: 211(ivec2) UConvert 221
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223: 211(ivec2) Bitcast 222
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Store 213(iv) 223
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227: 224(ivec2) Load 226(uv)
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228:187(i16vec2) UConvert 227
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223: 222(ivec2) UConvert 221
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224: 211(ivec2) Bitcast 223
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Store 213(iv) 224
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227: 222(ivec2) Load 226(uv)
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228:198(i16vec2) UConvert 227
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229:187(i16vec2) Bitcast 228
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Store 189(i16v) 229
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230: 224(ivec2) Load 226(uv)
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230: 222(ivec2) Load 226(uv)
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231:198(i16vec2) UConvert 230
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Store 200(u16v) 231
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232:187(i16vec2) Load 189(i16v)
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233: 211(ivec2) SConvert 232
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234: 224(ivec2) Bitcast 233
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234: 222(ivec2) Bitcast 233
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Store 226(uv) 234
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235:198(i16vec2) Load 200(u16v)
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236: 224(ivec2) UConvert 235
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236: 222(ivec2) UConvert 235
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Store 226(uv) 236
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241: 238(fvec2) Load 240(fv)
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242:187(i16vec2) ConvertFToS 241
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@@ -514,22 +514,22 @@ spv.int16.amd.frag
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283:274(i64vec2) SConvert 282
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Store 276(i64v) 283
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284:198(i16vec2) Load 200(u16v)
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285:274(i64vec2) UConvert 284
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286:274(i64vec2) Bitcast 285
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Store 276(i64v) 286
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291:288(i64vec2) Load 290(u64v)
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292:187(i16vec2) UConvert 291
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287:286(i64vec2) UConvert 284
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288:274(i64vec2) Bitcast 287
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Store 276(i64v) 288
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291:286(i64vec2) Load 290(u64v)
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292:198(i16vec2) UConvert 291
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293:187(i16vec2) Bitcast 292
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Store 189(i16v) 293
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294:288(i64vec2) Load 290(u64v)
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294:286(i64vec2) Load 290(u64v)
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295:198(i16vec2) UConvert 294
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Store 200(u16v) 295
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296:187(i16vec2) Load 189(i16v)
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297:274(i64vec2) SConvert 296
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298:288(i64vec2) Bitcast 297
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298:286(i64vec2) Bitcast 297
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Store 290(u64v) 298
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299:198(i16vec2) Load 200(u16v)
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300:288(i64vec2) UConvert 299
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300:286(i64vec2) UConvert 299
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Store 290(u64v) 300
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301:198(i16vec2) Load 200(u16v)
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302:187(i16vec2) Bitcast 301
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@@ -696,9 +696,9 @@ spv.int16.amd.frag
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Store 305(i16v) 439
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442: 14(int16_t) Load 321(u16)
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444:443(i16vec4) CompositeConstruct 442 442 442 442
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445:287(int64_t) Bitcast 444
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445:285(int64_t) Bitcast 444
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Store 441(packu64) 445
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446:287(int64_t) Load 441(packu64)
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446:285(int64_t) Load 441(packu64)
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447:443(i16vec4) Bitcast 446
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448: 49(i16vec3) VectorShuffle 447 447 0 1 2
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Store 319(u16v) 448
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