Fix #1360: uint->int width conversions must still be typed as uint.

This commit is contained in:
John Kessenich
2018-06-04 19:11:25 -06:00
parent 14b85d3ff3
commit ad7645f4f5
8 changed files with 662 additions and 701 deletions

View File

@@ -143,8 +143,8 @@ spv.int16.amd.frag
205:198(i16vec2) ConstantComposite 203 203
211: TypeVector 28(int) 2
212: TypePointer Function 211(ivec2)
224: TypeVector 18(int) 2
225: TypePointer Function 224(ivec2)
222: TypeVector 18(int) 2
225: TypePointer Function 222(ivec2)
237: TypeFloat 32
238: TypeVector 237(float) 2
239: TypePointer Function 238(fvec2)
@@ -157,9 +157,9 @@ spv.int16.amd.frag
273: TypeInt 64 1
274: TypeVector 273(int64_t) 2
275: TypePointer Function 274(i64vec2)
287: TypeInt 64 0
288: TypeVector 287(int64_t) 2
289: TypePointer Function 288(i64vec2)
285: TypeInt 64 0
286: TypeVector 285(int64_t) 2
289: TypePointer Function 286(i64vec2)
316: 17(int16_t) Constant 4294967295
317:187(i16vec2) ConstantComposite 316 316
326: 49(i16vec3) ConstantComposite 202 202 202
@@ -175,7 +175,7 @@ spv.int16.amd.frag
407: TypePointer Function 261(float16_t)
431: TypePointer Function 273(int64_t)
434: TypeVector 17(int16_t) 4
440: TypePointer Function 287(int64_t)
440: TypePointer Function 285(int64_t)
443: TypeVector 14(int16_t) 4
449: TypePointer Function 388(bvec3)
515(Block): TypeStruct 54(i16vec3) 14(int16_t)
@@ -186,7 +186,7 @@ spv.int16.amd.frag
520: TypePointer Input 17(int16_t)
521(ii16): 520(ptr) Variable Input
522(si64):273(int64_t) SpecConstant 4294967286 4294967295
523(su64):287(int64_t) SpecConstant 20 0
523(su64):285(int64_t) SpecConstant 20 0
524(si): 28(int) SpecConstant 4294967291
525(su): 18(int) SpecConstant 4
526(sb): 125(bool) SpecConstantTrue
@@ -197,7 +197,7 @@ spv.int16.amd.frag
531: 17(int16_t) SpecConstantOp 169 526(sb) 53 194
532: 14(int16_t) SpecConstantOp 169 526(sb) 203 202
533: 28(int) SpecConstantOp 114 527(si16)
534: 28(int) SpecConstantOp 113 528(su16)
534: 18(int) SpecConstantOp 113 528(su16)
535: 28(int) SpecConstantOp 128 534 128
536: 17(int16_t) SpecConstantOp 114 524(si)
537: 17(int16_t) SpecConstantOp 114 524(si)
@@ -205,20 +205,20 @@ spv.int16.amd.frag
539: 28(int) SpecConstantOp 114 527(si16)
540: 18(int) SpecConstantOp 128 539 128
541: 18(int) SpecConstantOp 113 528(su16)
542: 17(int16_t) SpecConstantOp 113 525(su)
542: 14(int16_t) SpecConstantOp 113 525(su)
543: 17(int16_t) SpecConstantOp 128 542 202
544: 14(int16_t) SpecConstantOp 113 525(su)
545:273(int64_t) SpecConstantOp 114 527(si16)
546:273(int64_t) SpecConstantOp 113 528(su16)
547:287(int64_t) Constant 0 0
546:285(int64_t) SpecConstantOp 113 528(su16)
547:285(int64_t) Constant 0 0
548:273(int64_t) SpecConstantOp 128 546 547
549: 17(int16_t) SpecConstantOp 114 522(si64)
550: 17(int16_t) SpecConstantOp 114 522(si64)
551: 14(int16_t) SpecConstantOp 128 550 202
552:273(int64_t) SpecConstantOp 114 527(si16)
553:287(int64_t) SpecConstantOp 128 552 547
554:287(int64_t) SpecConstantOp 113 528(su16)
555: 17(int16_t) SpecConstantOp 113 523(su64)
553:285(int64_t) SpecConstantOp 128 552 547
554:285(int64_t) SpecConstantOp 113 528(su16)
555: 14(int16_t) SpecConstantOp 113 523(su64)
556: 17(int16_t) SpecConstantOp 128 555 202
557: 14(int16_t) SpecConstantOp 113 523(su64)
558: 14(int16_t) SpecConstantOp 128 527(si16) 202
@@ -450,22 +450,22 @@ spv.int16.amd.frag
220: 211(ivec2) SConvert 219
Store 213(iv) 220
221:198(i16vec2) Load 200(u16v)
222: 211(ivec2) UConvert 221
223: 211(ivec2) Bitcast 222
Store 213(iv) 223
227: 224(ivec2) Load 226(uv)
228:187(i16vec2) UConvert 227
223: 222(ivec2) UConvert 221
224: 211(ivec2) Bitcast 223
Store 213(iv) 224
227: 222(ivec2) Load 226(uv)
228:198(i16vec2) UConvert 227
229:187(i16vec2) Bitcast 228
Store 189(i16v) 229
230: 224(ivec2) Load 226(uv)
230: 222(ivec2) Load 226(uv)
231:198(i16vec2) UConvert 230
Store 200(u16v) 231
232:187(i16vec2) Load 189(i16v)
233: 211(ivec2) SConvert 232
234: 224(ivec2) Bitcast 233
234: 222(ivec2) Bitcast 233
Store 226(uv) 234
235:198(i16vec2) Load 200(u16v)
236: 224(ivec2) UConvert 235
236: 222(ivec2) UConvert 235
Store 226(uv) 236
241: 238(fvec2) Load 240(fv)
242:187(i16vec2) ConvertFToS 241
@@ -514,22 +514,22 @@ spv.int16.amd.frag
283:274(i64vec2) SConvert 282
Store 276(i64v) 283
284:198(i16vec2) Load 200(u16v)
285:274(i64vec2) UConvert 284
286:274(i64vec2) Bitcast 285
Store 276(i64v) 286
291:288(i64vec2) Load 290(u64v)
292:187(i16vec2) UConvert 291
287:286(i64vec2) UConvert 284
288:274(i64vec2) Bitcast 287
Store 276(i64v) 288
291:286(i64vec2) Load 290(u64v)
292:198(i16vec2) UConvert 291
293:187(i16vec2) Bitcast 292
Store 189(i16v) 293
294:288(i64vec2) Load 290(u64v)
294:286(i64vec2) Load 290(u64v)
295:198(i16vec2) UConvert 294
Store 200(u16v) 295
296:187(i16vec2) Load 189(i16v)
297:274(i64vec2) SConvert 296
298:288(i64vec2) Bitcast 297
298:286(i64vec2) Bitcast 297
Store 290(u64v) 298
299:198(i16vec2) Load 200(u16v)
300:288(i64vec2) UConvert 299
300:286(i64vec2) UConvert 299
Store 290(u64v) 300
301:198(i16vec2) Load 200(u16v)
302:187(i16vec2) Bitcast 301
@@ -696,9 +696,9 @@ spv.int16.amd.frag
Store 305(i16v) 439
442: 14(int16_t) Load 321(u16)
444:443(i16vec4) CompositeConstruct 442 442 442 442
445:287(int64_t) Bitcast 444
445:285(int64_t) Bitcast 444
Store 441(packu64) 445
446:287(int64_t) Load 441(packu64)
446:285(int64_t) Load 441(packu64)
447:443(i16vec4) Bitcast 446
448: 49(i16vec3) VectorShuffle 447 447 0 1 2
Store 319(u16v) 448